7.2. Floorplanning Methods
Floorplanning is chip-level layout design. When designing a leaf cell, we used transistors and vias as our basic components; floorplanning uses the adders, registers, and FSMs as the building blocks. The fundamental difference between floorplanning and leaf-cell design is that floorplanning works with components that are much larger than the wires connecting them. This great size mismatch forces us to analyze the layout differently and to make different trade-offs during design.
Many chips are composed from cells of a variety of shapes and sizes, as shown in Figure 7-1. We call the layout cells blocks during floorplanning because we use them like building blocks to construct the floorplan. In bricks-and-mortar style layout, the cells may have radically different sizes and shapes. The layout program must place the components on the chip by position and orientation, leaving sufficient space between the components for the necessary wires. Blocks may be redesigned to change their aspect ratio in order to improve the floorplan. As we will see, the more complex traffic pattern of wiring areas makes routing wires in a bricks-and-mortar layout much harder than in a standard cell layout. (Some people use the term standard cell for any layout, including brick-and-mortar, which is built from pre-designed components. Since standard cell is a much abused term, be sure you understand its meaning in the context in which it is used.)
Figure 7-1. A typical layout, built from a variety of styles.
The next example shows the floorplan for a large chip.
Example 7-1. Floorplan of the IBM Power 2 Super Chip
The Power 2 Super Chip (P2SC) is a large microprocessor. It has over 15 million transistors (5.7 million logic, 9.3 million cache) on an 18.2x18.4mm2 die. The chip is fabricated in a 0.27μm, 5-level-metal process. The chip comes in 120 and 135 MHz versions.
The chip photomicrograph has been overlaid below with the floorplan showing the major functional units:
Photo courtesy of IBM.
Tom Way, IBM Microelectronics, Essex Junction, VT
This chip is large enough that each of the units in the chip-level floorplan has its own internal floorplan. The DCU units contain memory arrays as well as driver and control logic. The ICU unit contains several data paths along with the necessary control logic.
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Featured Case study
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Featured Case study
The idea
Integrate APAC into the enterprise network to improve ability to access and share worldwide network resources, applications and shared folders.
The client
Honeywell is a $23 billion diversified technology and manufacturing leader, serving customers worldwide.
The business challenge
Honeywell's Windows architecture for the Asia Pacific region (APAC) region comprised of 16 account domains, spread across 11 countries and 58 sites. The lack of integration was severely hampering the ability of APAC employees to access computer resources across the company, including critical corporate applications. Employees around the world had similar difficulties accessing information on the APAC network.
The solution
Wipro carried out a pre-migration workshop for better understanding of Honeywell's requirements.
Six WINS servers and 12 Domain Controllers were deployed in 11 countries to support the WINS and NT migration initiatives. Following this Honeywell's APAC network was integrated with the rest of the network to support the strategic initiatives. Users and groups were migrated from 16 domains into a single master account domain.
Elaborate risk and mitigation plans were identified for addressing issues and concerns during the project. In spite of relocation of a project team due to the SARS outbreak, there was zero impact on project delivery and the execution of the entire project was performed from a single location and completed ahead of schedule
Wipro received a Customer Satisfaction Rating of 5/5 from Honeywell on delivery, quality and service.
Business benefits
Enhanced collaboration and resource sharing across global locations.
Centralized management and fewer management entities.
Continued access to network resources even during link failures with a revised authentication approach
Case Studies by industries • Energy & Utilities • Finance • HealthScience • Insurance • Manufacturing • Media & Entertainment • Retail, CPG and Distribution • Software Products • Travel & Transport • Telecom Service Providers Case Studies by industries • Aerospace, Defense & Satellite • Automotive Electronics • Consumer Electronics • Computing Peripherals • Computing Platforms & Software Products • Home Networking • Industrial Automation • Mobile Devices & Applications • Semiconductors • Telecommunication and Internetworking
Case Studies by services • Business Intelligence & Data Warehousing • e-Business • Enterprise Applications Services • Enterprise Security Case Studies by services • Hardware Design - ASIC design - FPGA based design - SoC design • Support Services - Infrastructure Support Services • Testing - Interoperability testing - Verification & Validation - Engineering Design Services
Case Studies by technologies • Embedded Software • Home Gateway • IEEE 1394 Solutions • Multimedia • Network Management • VLSI/ System design
BPO Case Studies
Talent Transformation Case Studies
--------------------------------------------------------------------------------
Featured Case study
The idea
Integrate APAC into the enterprise network to improve ability to access and share worldwide network resources, applications and shared folders.
The client
Honeywell is a $23 billion diversified technology and manufacturing leader, serving customers worldwide.
The business challenge
Honeywell's Windows architecture for the Asia Pacific region (APAC) region comprised of 16 account domains, spread across 11 countries and 58 sites. The lack of integration was severely hampering the ability of APAC employees to access computer resources across the company, including critical corporate applications. Employees around the world had similar difficulties accessing information on the APAC network.
The solution
Wipro carried out a pre-migration workshop for better understanding of Honeywell's requirements.
Six WINS servers and 12 Domain Controllers were deployed in 11 countries to support the WINS and NT migration initiatives. Following this Honeywell's APAC network was integrated with the rest of the network to support the strategic initiatives. Users and groups were migrated from 16 domains into a single master account domain.
Elaborate risk and mitigation plans were identified for addressing issues and concerns during the project. In spite of relocation of a project team due to the SARS outbreak, there was zero impact on project delivery and the execution of the entire project was performed from a single location and completed ahead of schedule
Wipro received a Customer Satisfaction Rating of 5/5 from Honeywell on delivery, quality and service.
Business benefits
Enhanced collaboration and resource sharing across global locations.
Centralized management and fewer management entities.
Continued access to network resources even during link failures with a revised authentication approach
VLSI AND SYSTEM DESIGN
VLSI AND SYSTEM DESIGN
Case Study
Development of a ARM based automotive SoC
Brief
Architecture based on ARM7TDMI with a DSP core as peripheral
Macro intensive
High utilization factor
Stringent Clock dependency in terms of pulse width, skew and insertion delay.
Mix of Clocks
Multiple frequency and phase clocks
Functional and Test clocks
Design complexity
2 Million gate , exclusive of macros
Die Size of 65 mm^2
75Mhz(ARM & DSP)
Integrated on a 356 pin BGA package
Uses 0.15um low power library
Result
Turnaround time of 8 months
Case Study
Development of a ARM based automotive SoC
Brief
Architecture based on ARM7TDMI with a DSP core as peripheral
Macro intensive
High utilization factor
Stringent Clock dependency in terms of pulse width, skew and insertion delay.
Mix of Clocks
Multiple frequency and phase clocks
Functional and Test clocks
Design complexity
2 Million gate , exclusive of macros
Die Size of 65 mm^2
75Mhz(ARM & DSP)
Integrated on a 356 pin BGA package
Uses 0.15um low power library
Result
Turnaround time of 8 months
art in VLSI design
The state of the art in VLSI design: layouts, circuits, logic, floorplanning, and architectures
New techniques for maximizing performance and minimizing power usage
Extensive new coverage of advanced interconnect models, including copper
Up-to-the-minute coverage of IP-based design
Detailed HDL introductions: Verilog and VHDL
The #1 VLSI design guide-now fully updated to reflect the latest advances in SoC design
Modern VLSI Design, System-on-Chip Design, Third Edition is a comprehensive, "bottom-up" guide to the entire VLSI design process, focusing on the latest solutions for System-on-Chip (SoC) design. Wayne Wolf reviews every aspect of digital design, from planning and layout to fabrication and packaging, introducing today's most advanced techniques for maximizing performance, minimizing power utilization, and achieving rapid design turnarounds. Coverage includes:
Advanced interconnect models: new techniques for overcoming delay bottlenecks, reducing crosstalk, and modeling copper interconnect
Advanced low-power design techniques for enhancing reliability and extending battery life in portable consumer electronics
Testing solutions for every level of abstraction, from circuits to architecture
Practical IP-based design solutions
A thorough overview of HDLs, including new introductions to Verilog and VHDL
Techniques for improving testability, embedded processors, and more
VLSI design for today's high-performance, low-power devices requires broader, deeper skills than ever before. Modern VLSI Design, System-on-Chipbrings together those skills in a single, comprehensive resource that will be invaluable to every VLSI design engineer and manager.
Table of Contents
1: Digital Systems and VLSI.
Why Design Integrated Circuits?
Integrated Circuit Manufacturing.
CMOS Technology.
Integrated Circuit Design Techniques.
A Look into the Future. Summary.
2: Transistors and Layout.
Fabrication Processes.
Transistors.
Wires and Vias.
Design Rules.
Layout Design and Tools.
3: Logic Gates.
Combinational Logic Functions.
Static Complementary Gates.
Switch Logic.
Alternative Gate Circuits.
Wires and Delay.
4: Combinational Logic Networks.
Layout Design Methods.
Simulation.
Combinational Network Delay.
Crosstalk.
Power Optimization.
Switch Logic Networks.
Combinational Logic Testing.
5: Sequential Machines.
Latches and Flip-Flops.
Sequential Systems and Clocking Disciplines.
Sequential System Design.
Power Optimization.
Design Validation.
Sequential Testing.
6: Subsystem Design.
Subsystem Design Principles.
Combinational Shifters.
Adders.
ALUs.
Multipliers.
High-Density Memory.
Field-Programmable Gate Arrays.
Programmable Logic Arrays.
7: Floorplanning.
Floorplanning Methods.
Floorplanning Large Chips.
Off-Chip Connections.
8: Architecture Design.
Hardware Description Languages.
Register-Transfer Design.
High-Level Synthesis.
Architecture for Low Power.
Architecture Testing.
9: Chip Design.
Design Methodologies.
Kitchen Timer Chip.
PDP-8 Data Path.
10: CAD Systems and Algorithms.
CAD Systems.
Simulation.
Layout Synthesis.
Layout Analysis.
Timing Analysis and Optimization.
Logic Synthesis.
Test Generation.
Sequential Machine Optimizations.
Scheduling and Binding.
Hardware/Software Co-Design.
Appendix A: A Chip Designer's Lexicon.
Appendix B: Chip Design Projects.
Class Project Ideas. Project Proposal and Specification. Design Plan. Design Checkpoints and Documentation.
Appendix C: Design Modeling.
Hardware Modeling in VHDL.
Hardware Modeling in C.
New techniques for maximizing performance and minimizing power usage
Extensive new coverage of advanced interconnect models, including copper
Up-to-the-minute coverage of IP-based design
Detailed HDL introductions: Verilog and VHDL
The #1 VLSI design guide-now fully updated to reflect the latest advances in SoC design
Modern VLSI Design, System-on-Chip Design, Third Edition is a comprehensive, "bottom-up" guide to the entire VLSI design process, focusing on the latest solutions for System-on-Chip (SoC) design. Wayne Wolf reviews every aspect of digital design, from planning and layout to fabrication and packaging, introducing today's most advanced techniques for maximizing performance, minimizing power utilization, and achieving rapid design turnarounds. Coverage includes:
Advanced interconnect models: new techniques for overcoming delay bottlenecks, reducing crosstalk, and modeling copper interconnect
Advanced low-power design techniques for enhancing reliability and extending battery life in portable consumer electronics
Testing solutions for every level of abstraction, from circuits to architecture
Practical IP-based design solutions
A thorough overview of HDLs, including new introductions to Verilog and VHDL
Techniques for improving testability, embedded processors, and more
VLSI design for today's high-performance, low-power devices requires broader, deeper skills than ever before. Modern VLSI Design, System-on-Chipbrings together those skills in a single, comprehensive resource that will be invaluable to every VLSI design engineer and manager.
Table of Contents
1: Digital Systems and VLSI.
Why Design Integrated Circuits?
Integrated Circuit Manufacturing.
CMOS Technology.
Integrated Circuit Design Techniques.
A Look into the Future. Summary.
2: Transistors and Layout.
Fabrication Processes.
Transistors.
Wires and Vias.
Design Rules.
Layout Design and Tools.
3: Logic Gates.
Combinational Logic Functions.
Static Complementary Gates.
Switch Logic.
Alternative Gate Circuits.
Wires and Delay.
4: Combinational Logic Networks.
Layout Design Methods.
Simulation.
Combinational Network Delay.
Crosstalk.
Power Optimization.
Switch Logic Networks.
Combinational Logic Testing.
5: Sequential Machines.
Latches and Flip-Flops.
Sequential Systems and Clocking Disciplines.
Sequential System Design.
Power Optimization.
Design Validation.
Sequential Testing.
6: Subsystem Design.
Subsystem Design Principles.
Combinational Shifters.
Adders.
ALUs.
Multipliers.
High-Density Memory.
Field-Programmable Gate Arrays.
Programmable Logic Arrays.
7: Floorplanning.
Floorplanning Methods.
Floorplanning Large Chips.
Off-Chip Connections.
8: Architecture Design.
Hardware Description Languages.
Register-Transfer Design.
High-Level Synthesis.
Architecture for Low Power.
Architecture Testing.
9: Chip Design.
Design Methodologies.
Kitchen Timer Chip.
PDP-8 Data Path.
10: CAD Systems and Algorithms.
CAD Systems.
Simulation.
Layout Synthesis.
Layout Analysis.
Timing Analysis and Optimization.
Logic Synthesis.
Test Generation.
Sequential Machine Optimizations.
Scheduling and Binding.
Hardware/Software Co-Design.
Appendix A: A Chip Designer's Lexicon.
Appendix B: Chip Design Projects.
Class Project Ideas. Project Proposal and Specification. Design Plan. Design Checkpoints and Documentation.
Appendix C: Design Modeling.
Hardware Modeling in VHDL.
Hardware Modeling in C.
Chip-Level Thermal Simulator to Predict VLSI Chip Temperature *
Chip-Level Thermal Simulator to Predict VLSI Chip Temperature *
Yi-Kan Cheng, and Sung-Mo Kang
Coordinated Science Laboratory
University of Illinois at Urbana-Champaign
Phone:(217) 244-0044 Fax:(217) 244-1946
yikanQuivlsi. csl.uiuc.edu
ABSTRACT
In this paper, a new thermal simulator is developed to
predict the steady-state and transient temperatures inside
a VLSI chip subjected to hea.ting by single or multiple
heat sources. It uses a mixed 3-D finite-difference
and 1-D analogous thermal circuit method, taking into
account any combination of boundary conditions, shape
of heat> sources, and packaging. An analytical method is
also presented and compared to the numerical method.
With this tool, the chip temperature can be predicted
accurately to provide design guidelines for VLSI module
placement and chip packaging.
I. INTRODUCTION
With downward scaling of device dimensions, the number
of gates on a single chip has been increasing steadily. The
increase in the chip size and power dissipation has lead
to an increase in the chip temperature. In fact, the temperature
of a packaged VLSI chip can vary by as many as
a few tens of degrees from the center to the edges of the
chip.
In the past, device and circuit-level thermal simulators
[l, 21 were developed to predict the device temperature as
a function of dissipated power or the temperature profile
of the whole integrated circuit. For small geometries, 1-
D a.nd 2-D simulations were adopted and the packaging
effects and the relative boundary conditions(BC's) were
usually simplified or even overlooked. In a VLSI chip,
however, these effects play important roles in determining
the temperature distribution over an entire chip.
The objective of this paper is to develop a chip-level
thermal simulator to accurately determine the temperature
distribution over a VLSI chip. The chip dimensions,
the shape and layout of heat sources, amount of dissipated
*This research was supported in part by Intel Corporation, Air
Force Rome Laboratory (F30602-94-1-0006), JSEP (N00014-94-Jpowers,
packaging materials, ambient temperatures, and
BC's can be specified by users. Based on this information,
a mixed 3-D finite-difference and 1-D equivalent thermal
circuit simulator calculates the temperature at every mesh
point. An analytical model is also implemented in this
simulator to calculate the temperat,ure of specific points
wit,h computational efficiency.
11. FORMULATION
The heat diffusion equation is the governing equation for
VLSI chip temperatures. For an isotropic material, the
general equation is written as [3]
(1)
-d+2T -d+2T -d+2T -g = _1 _dT
a 2 2 dy2 a z 2 IC at
subjected to the general BC:
where g is the power density of the source(s) (W/m3), k%
is the thermal conductivity (W/m '(2) of the bulk, Q is
the thermal diffusivity, h, is the heat transfer coefficient
(W/m2 "C), and n, is the outward direction normal to the
surface i. For steady-state case, the term will drop out.
Three kinds of BC's can be specified at the six surfaces
of the chip:
1. BC o f t h e first kind, also called isothermal BC. Temperature
is prescribed along the boundary surfaces
in this case and (2) will reduce to T = f2(z, y, z ) .
2. BC of the second kind. This is equivalent to prescribing
the magnitude of the heat flux along the
surfaces and (2) will reduce to = f i ( x , y, z ) . For
fi(z, y, z ) = 0, this is referred as insulated or adia-
1270) and Semiconductor Research Corporation(SRC93-DP-109). batac BC.
0-7803-2570-2/95 $4.00 01995 IEEE 1392
Authorized licensed use limited to: IEEE Xplore. Downloaded on December 12, 2008 at 05:10 from IEEE Xplore. Restrictions apply.
0.05 <
;70
Figure 1 : Simulated chip wiih mesh system.(not to scale)
,"Vl.,2 20)
Figure 2. Chip temperaturc profile with three rectangular
soiirces with dimension:(4~4),(2~44),(5~6l)o cated at
(28,28),(17,40) and (2,20) respectively. (unit: mesh point).
3. BC 01 the third kind. This is also called the convective
BC. The generd form this BC is exactly as
in (2). IIowever, a more physical form can be expressed
as the following:
where Ta is the ambient temperature.
A. Finite-Difference Model
Figure 1 illustrates the simplified model for the simulated
chip by finite-difference method. A 0.5cmx0.5cmx0.05cm
chip is divided, for example, to 50 x 50 x 25 meshpoints,
spccilied by users. Then the fiiiite-difference method is
iL,tivatcd once all the information has been inputted.
Tlie program uses Ihe c:ontrol volume finite-difference
approach [4] and the linear equations are solved using successiv?
over-relaxation algorithm(S0R). Several cases are
simulated as the foilowing. Figure 2 shows the temperature
distribution along the t,he X-Y surface at z 0.025cni
with several rectangular heat sources with different sizes,
different powers at different locations. The BC's are assumed
to be 50 "C all over the four sidewalls(isotherma1)
while insulated at the top and bottom surfaces. Tlie powers
are choseii t80 be 1.4W(source l), 0.4W(source 2) and
2.8W(source 3 ) . This figure reveals the 20 "C difference
from hot spots to the edge:j of the chip. This thermal
simulator can process any smooth heat, function and any
shape of heat sources, besides rectangular sources with
uniform power dissipation.
Figure
Fig. 2.
y-direclion x-dlreclon
Figure 4: 'Temperature profile with mixed BC's subjected to
three point sources al, (2,3),(30,45) and (70,20).
Transient simulation is also performed. An implicit
scheme 131 was used and the results are shown in Fig. 3.
From this figure we can conclude that it will take about
0.15ms for the chip to reach steady state at source 1, while
only take about 0.05ms at source 3.
Figure 4 shows the temperature distribution with 3
point sources subjected to mixed boundary conditions: top
and bottom surface are isothermal, back and right surfaces
are insulated, and the front, and left surfaces are convective
to ambient temperature 27 "c'. An equivalent contour
plot in Fig. 5 shows that the big temperature jump
around the heat source 1 c m have substantial effect on
any temperature-dependents chip or circuit behaviors.
R. Analytzcnl Model
An analytical niodel is also iml)lemcnt,ed in this simulator.
Analyt,ical melliod lins its limitation lor complex
Figure 5: Contour plot with mixed BC's subjectcd to three
point sources.
1393
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Figure 6: Chip profile, including package, heat sink, and pins. Figure 7: Equivalent thermal circuit.
structures, however, it is more time efficient than numerical
methods whcn the temperatures need to be calculated
for only a few specific points. While the finite-difference
scheme requires information on all the neighboring meshpoints
to calculate the current mesh-point, the analytical
method needs not. For simplicity, only special case with
all six sides kept to zero temperature and with initial temperature
F ( z , y, z ) is presented here [3]:
m=l n=l p=l
K ( p m ,x ), K(vn,y ), i<(vpz, ) are kernels, (om,U, ! qP)a re
eigeiivaliies, F(pm, U,, vp) and ij(p,, v,, qp,t ') are transformed
pairs of F and power density g used in the integral
Transform [3, 51. For real computer implementation, only
finite terms are added. The number of terms used in this
series expansion is determined by the convergence criterion;
the additional terms which cont,ribute only a small
amount(0.01 "C) of change to this summation can be terminated.
To know the temperatures of one thousand out
of all 25000 meshed points, for example, the analytical
method took 10.72 seconds and finite-difference method
took 15.42 seconds CPU time on SUN SPARCstation 10
for the case in Fig. 2.
111. CHIPT EMPERATUWRITEH PACKAGING
It is essential to consider the packaging material and heat
sink in the thermal simulator since they are critical in
determining chip temperatures. Figure 6 shows the realistic
chip picture. This figure includes the bottom heat
sink, plastic or ceramic packaging materials around the
other bulk surfaces, and several pins. There are two more
BC's involved in a packaged chip. Firstly, the temperature
is continuous at the interface of two different materials,
i.e., T(')= 7"2).S econdly, the heat flux is continuous,
i.e., IC!''& an I = k i 2 ) e at interfaces. These extra BC's
could make this problem much more complicated, both
for finite-difference scheme and analytical method. In the
finite-difference scheme, it must take into account the different
thermal conductivities of two or three materials in
conjunction and then apply the above continuity properties.
In the analyt.ica1 method, there is no exact solutioii
of this chip structure. To solve this problem, a time efficient
heuristic method is used. Let us first look at the
chip structure in Fig. 6.
A. Packaged Chip Model for Worst Case Analysis
For the worst case analysis, we can assume the bottom
surface being convective to the ambient and the other five
surfaces adiabatic. This is a good approximation for a system
with small hi, (For example, free convectmionw ith the
air, hi only M 8W/m2 "C) a.nd the thermal conductivity
of the package is small compared to the heat sink. With
these underlying assumpt,ions, simulations can be done as
discussed in section 11.
B. Packaged Chzp Model in Realistic Case
If the above assumptions are removed, then the bottom
heat sink and the other five packaging materials are actually
all convective to the ambient 27 "C and a more
realistic model has to be built. Here we use the analogous
thermal czrcuzt concept for our package simulation,
as pictured in Fig. 7. This idea stems from that what the
t,emperature is to the heat flow is analogous to what the
voltage is to the the current flow. The relationship between
thermal and electric circuit is the following, where
p is the heat flow(TYatt).
mThermal Electriic After having this picture in mind, we now can look at
the thermal conduction problem as an electric one. There
are two kinds of the thermal resistance Ri in this picture:
(i)Rfk = K;Gck:geA, of a plane wall i, where Ai is the
area ,Li is the length of the plane wall, i.e., packages or
heat sink, and liiackagise the thermal conductivity of
the packaging material. (ii) Rth = from plane wall
1394
Authorized licensed use limited to: IEEE Xplore. Downloaded on December 12, 2008 at 05:10 from IEEE Xplore. Restrictions apply.
3' ,
Figure 8: 3-D temperature plot of thermal circuit model.
surfaces to tile air (or other fluid), where hi is the heat
t,ransfer coefscient, as in (2). T; in Fig. 7 is the ambient
temperature around the individual chip surface, i from 1
to 6. Here we have tacitly assumed that we can neglect
the lateral heat diRusion within the packages and the heat
sink so that the analogous i,hermal resistances can be put
in the 1-ID forrn perpendicular to the surfaces as in Fig. 7.
Once this is done, then the two resistances in series can be
added up and we may define a new term for convenience
as thc following:
(5)
where IT; is called overall heat frans,fer coeficzent. Therefore
t8he original complicat,ed packaged chip problem is
mapped to the simplified one by replacing hi's with Hi's.
Rotice that, however, the bulk of the chip still requires 3-
D simulation in stead of 1-11 or 2-U because the thickness
of'tlie hulk is not srnall enough to be ignored.
C. Simulation Resull
In Fig. 8 we show the simulated 3-D temperature profile
using the equivalent thermal circuit model in (5). Here
we assume that the thermal conductivity of the packaging
materialis 230 W/m OC(ceramic) and that ofthe heat sink
is 300 W/rn "C (gold), the thickness of the packages and
lieat sinks are all 0.5 mm. 'I'he lieat, sources are exactly the
same as in Fig. 2. This simulator required 27.90 seconds
CP1J time on SUN SPARCstation 10 for this ciise. We
also plot the lemperature. predicted by the worst case
model A and by the thermal circuit model B in Fig. 9 for
comparison.
Figure 9(a) shows that, the worst case analysis slightly
overestimates t,he chip tkniperature for srnall h; . However,
for t,he large hi ([or (example, 34700 W/m2 '6 for
forced convect,ion) as in Fg. 9(b), thc temperature difference
between model A and B can be as large as 2 'C'
at the boundaries of the chip. This is expected because
in reality, the small amount of heat transfer between the
chip and siirrounding ambient does OCCIII. And this difference
wiil increase as the heat transfer coeflicient increases.
Figure 9: Temperature distributions along the x-direction at
(y,z)=(25,5) (unitmesh point) with two different models and
two different hZ's.
Thus we expect the chip temperature to be lower llian in
tlhe worst case model prediction.
To take t,he effect of the pins into account, we can replace
kiackageii i above approximat,ely by
I& = + (1 - X)I<;aekagt (6)
where X=(Area of pins)/(Totai package area). This
means that we can handle the pins or any ot,her packaging
structures of a chip in our sirnulalor simply by using
equation (6).
117. CONCI,USIONS
Complete st,eady-st,ate and transient, teinperature simulator
has been developed to compute temperatures over an
entire chip. Diffprent boundary conditions, cllip layout,
shape of heat sources; power consumption, and pncltagiiig
parameters caii bc applied to this simulator. Mixed 3-D
finite-difference and 1-D equivalent t,liermal circuit siniulator
is used to estimate the packaged chip tcmpcraturc
efficiently. By usiiig t,his simulator. the VLSl chip t,em-
I be predict,ed t80 provide dcsigii guidcliiics for
module placement8 ai I (1 chip packaging .
REFER EN c: E s
[l] V. Ilwycr, A. Franklin, and D. Campbell, '"lherinal
failure ir: semiconductor devices," Solid State Electrmzcs,
~01.33p,p . 553-560, Maj. 1990.
[a] K. Fukahori, P. Gray, "Coiiiput~ers irnulat~iono f iiitegrated
circuits iii t,hc presence of electrothermal illteract,
ion," IBEE J. ,i'O/id-,StGtc C i r c ~ i ip~p,. 834-846,
Dec. 1976.
[3] M.N. 07,isik)H ourLda,ry vah~P roblems of H c a t C'oiaduction.
London, U.K. :Oxford, 1963.
[4] M.N. Ozisik, I k i t e DzjJerencc Xethods in Hcat
Transfer. CRC Press, 1994.
[5] R.V. Churchill, J.W. Brown, Pourier S'crzes a n d
Boundary Vukiie Problems. 4th ed. McCrnw-Hill,
1987.
1395
Authorized licensed use limited to: IEEE Xplore. Downloaded on December 12, 2008 at 05:10 from IEEE Xplore. Restrictions apply.
Yi-Kan Cheng, and Sung-Mo Kang
Coordinated Science Laboratory
University of Illinois at Urbana-Champaign
Phone:(217) 244-0044 Fax:(217) 244-1946
yikanQuivlsi. csl.uiuc.edu
ABSTRACT
In this paper, a new thermal simulator is developed to
predict the steady-state and transient temperatures inside
a VLSI chip subjected to hea.ting by single or multiple
heat sources. It uses a mixed 3-D finite-difference
and 1-D analogous thermal circuit method, taking into
account any combination of boundary conditions, shape
of heat> sources, and packaging. An analytical method is
also presented and compared to the numerical method.
With this tool, the chip temperature can be predicted
accurately to provide design guidelines for VLSI module
placement and chip packaging.
I. INTRODUCTION
With downward scaling of device dimensions, the number
of gates on a single chip has been increasing steadily. The
increase in the chip size and power dissipation has lead
to an increase in the chip temperature. In fact, the temperature
of a packaged VLSI chip can vary by as many as
a few tens of degrees from the center to the edges of the
chip.
In the past, device and circuit-level thermal simulators
[l, 21 were developed to predict the device temperature as
a function of dissipated power or the temperature profile
of the whole integrated circuit. For small geometries, 1-
D a.nd 2-D simulations were adopted and the packaging
effects and the relative boundary conditions(BC's) were
usually simplified or even overlooked. In a VLSI chip,
however, these effects play important roles in determining
the temperature distribution over an entire chip.
The objective of this paper is to develop a chip-level
thermal simulator to accurately determine the temperature
distribution over a VLSI chip. The chip dimensions,
the shape and layout of heat sources, amount of dissipated
*This research was supported in part by Intel Corporation, Air
Force Rome Laboratory (F30602-94-1-0006), JSEP (N00014-94-Jpowers,
packaging materials, ambient temperatures, and
BC's can be specified by users. Based on this information,
a mixed 3-D finite-difference and 1-D equivalent thermal
circuit simulator calculates the temperature at every mesh
point. An analytical model is also implemented in this
simulator to calculate the temperat,ure of specific points
wit,h computational efficiency.
11. FORMULATION
The heat diffusion equation is the governing equation for
VLSI chip temperatures. For an isotropic material, the
general equation is written as [3]
(1)
-d+2T -d+2T -d+2T -g = _1 _dT
a 2 2 dy2 a z 2 IC at
subjected to the general BC:
where g is the power density of the source(s) (W/m3), k%
is the thermal conductivity (W/m '(2) of the bulk, Q is
the thermal diffusivity, h, is the heat transfer coefficient
(W/m2 "C), and n, is the outward direction normal to the
surface i. For steady-state case, the term will drop out.
Three kinds of BC's can be specified at the six surfaces
of the chip:
1. BC o f t h e first kind, also called isothermal BC. Temperature
is prescribed along the boundary surfaces
in this case and (2) will reduce to T = f2(z, y, z ) .
2. BC of the second kind. This is equivalent to prescribing
the magnitude of the heat flux along the
surfaces and (2) will reduce to = f i ( x , y, z ) . For
fi(z, y, z ) = 0, this is referred as insulated or adia-
1270) and Semiconductor Research Corporation(SRC93-DP-109). batac BC.
0-7803-2570-2/95 $4.00 01995 IEEE 1392
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0.05 <
;70
Figure 1 : Simulated chip wiih mesh system.(not to scale)
,"Vl.,2 20)
Figure 2. Chip temperaturc profile with three rectangular
soiirces with dimension:(4~4),(2~44),(5~6l)o cated at
(28,28),(17,40) and (2,20) respectively. (unit: mesh point).
3. BC 01 the third kind. This is also called the convective
BC. The generd form this BC is exactly as
in (2). IIowever, a more physical form can be expressed
as the following:
where Ta is the ambient temperature.
A. Finite-Difference Model
Figure 1 illustrates the simplified model for the simulated
chip by finite-difference method. A 0.5cmx0.5cmx0.05cm
chip is divided, for example, to 50 x 50 x 25 meshpoints,
spccilied by users. Then the fiiiite-difference method is
iL,tivatcd once all the information has been inputted.
Tlie program uses Ihe c:ontrol volume finite-difference
approach [4] and the linear equations are solved using successiv?
over-relaxation algorithm(S0R). Several cases are
simulated as the foilowing. Figure 2 shows the temperature
distribution along the t,he X-Y surface at z 0.025cni
with several rectangular heat sources with different sizes,
different powers at different locations. The BC's are assumed
to be 50 "C all over the four sidewalls(isotherma1)
while insulated at the top and bottom surfaces. Tlie powers
are choseii t80 be 1.4W(source l), 0.4W(source 2) and
2.8W(source 3 ) . This figure reveals the 20 "C difference
from hot spots to the edge:j of the chip. This thermal
simulator can process any smooth heat, function and any
shape of heat sources, besides rectangular sources with
uniform power dissipation.
Figure
Fig. 2.
y-direclion x-dlreclon
Figure 4: 'Temperature profile with mixed BC's subjected to
three point sources al, (2,3),(30,45) and (70,20).
Transient simulation is also performed. An implicit
scheme 131 was used and the results are shown in Fig. 3.
From this figure we can conclude that it will take about
0.15ms for the chip to reach steady state at source 1, while
only take about 0.05ms at source 3.
Figure 4 shows the temperature distribution with 3
point sources subjected to mixed boundary conditions: top
and bottom surface are isothermal, back and right surfaces
are insulated, and the front, and left surfaces are convective
to ambient temperature 27 "c'. An equivalent contour
plot in Fig. 5 shows that the big temperature jump
around the heat source 1 c m have substantial effect on
any temperature-dependents chip or circuit behaviors.
R. Analytzcnl Model
An analytical niodel is also iml)lemcnt,ed in this simulator.
Analyt,ical melliod lins its limitation lor complex
Figure 5: Contour plot with mixed BC's subjectcd to three
point sources.
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Figure 6: Chip profile, including package, heat sink, and pins. Figure 7: Equivalent thermal circuit.
structures, however, it is more time efficient than numerical
methods whcn the temperatures need to be calculated
for only a few specific points. While the finite-difference
scheme requires information on all the neighboring meshpoints
to calculate the current mesh-point, the analytical
method needs not. For simplicity, only special case with
all six sides kept to zero temperature and with initial temperature
F ( z , y, z ) is presented here [3]:
m=l n=l p=l
K ( p m ,x ), K(vn,y ), i<(vpz, ) are kernels, (om,U, ! qP)a re
eigeiivaliies, F(pm, U,, vp) and ij(p,, v,, qp,t ') are transformed
pairs of F and power density g used in the integral
Transform [3, 51. For real computer implementation, only
finite terms are added. The number of terms used in this
series expansion is determined by the convergence criterion;
the additional terms which cont,ribute only a small
amount(0.01 "C) of change to this summation can be terminated.
To know the temperatures of one thousand out
of all 25000 meshed points, for example, the analytical
method took 10.72 seconds and finite-difference method
took 15.42 seconds CPU time on SUN SPARCstation 10
for the case in Fig. 2.
111. CHIPT EMPERATUWRITEH PACKAGING
It is essential to consider the packaging material and heat
sink in the thermal simulator since they are critical in
determining chip temperatures. Figure 6 shows the realistic
chip picture. This figure includes the bottom heat
sink, plastic or ceramic packaging materials around the
other bulk surfaces, and several pins. There are two more
BC's involved in a packaged chip. Firstly, the temperature
is continuous at the interface of two different materials,
i.e., T(')= 7"2).S econdly, the heat flux is continuous,
i.e., IC!''& an I = k i 2 ) e at interfaces. These extra BC's
could make this problem much more complicated, both
for finite-difference scheme and analytical method. In the
finite-difference scheme, it must take into account the different
thermal conductivities of two or three materials in
conjunction and then apply the above continuity properties.
In the analyt.ica1 method, there is no exact solutioii
of this chip structure. To solve this problem, a time efficient
heuristic method is used. Let us first look at the
chip structure in Fig. 6.
A. Packaged Chip Model for Worst Case Analysis
For the worst case analysis, we can assume the bottom
surface being convective to the ambient and the other five
surfaces adiabatic. This is a good approximation for a system
with small hi, (For example, free convectmionw ith the
air, hi only M 8W/m2 "C) a.nd the thermal conductivity
of the package is small compared to the heat sink. With
these underlying assumpt,ions, simulations can be done as
discussed in section 11.
B. Packaged Chzp Model in Realistic Case
If the above assumptions are removed, then the bottom
heat sink and the other five packaging materials are actually
all convective to the ambient 27 "C and a more
realistic model has to be built. Here we use the analogous
thermal czrcuzt concept for our package simulation,
as pictured in Fig. 7. This idea stems from that what the
t,emperature is to the heat flow is analogous to what the
voltage is to the the current flow. The relationship between
thermal and electric circuit is the following, where
p is the heat flow(TYatt).
mThermal Electriic After having this picture in mind, we now can look at
the thermal conduction problem as an electric one. There
are two kinds of the thermal resistance Ri in this picture:
(i)Rfk = K;Gck:geA, of a plane wall i, where Ai is the
area ,Li is the length of the plane wall, i.e., packages or
heat sink, and liiackagise the thermal conductivity of
the packaging material. (ii) Rth = from plane wall
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3' ,
Figure 8: 3-D temperature plot of thermal circuit model.
surfaces to tile air (or other fluid), where hi is the heat
t,ransfer coefscient, as in (2). T; in Fig. 7 is the ambient
temperature around the individual chip surface, i from 1
to 6. Here we have tacitly assumed that we can neglect
the lateral heat diRusion within the packages and the heat
sink so that the analogous i,hermal resistances can be put
in the 1-ID forrn perpendicular to the surfaces as in Fig. 7.
Once this is done, then the two resistances in series can be
added up and we may define a new term for convenience
as thc following:
(5)
where IT; is called overall heat frans,fer coeficzent. Therefore
t8he original complicat,ed packaged chip problem is
mapped to the simplified one by replacing hi's with Hi's.
Rotice that, however, the bulk of the chip still requires 3-
D simulation in stead of 1-11 or 2-U because the thickness
of'tlie hulk is not srnall enough to be ignored.
C. Simulation Resull
In Fig. 8 we show the simulated 3-D temperature profile
using the equivalent thermal circuit model in (5). Here
we assume that the thermal conductivity of the packaging
materialis 230 W/m OC(ceramic) and that ofthe heat sink
is 300 W/rn "C (gold), the thickness of the packages and
lieat sinks are all 0.5 mm. 'I'he lieat, sources are exactly the
same as in Fig. 2. This simulator required 27.90 seconds
CP1J time on SUN SPARCstation 10 for this ciise. We
also plot the lemperature. predicted by the worst case
model A and by the thermal circuit model B in Fig. 9 for
comparison.
Figure 9(a) shows that, the worst case analysis slightly
overestimates t,he chip tkniperature for srnall h; . However,
for t,he large hi ([or (example, 34700 W/m2 '6 for
forced convect,ion) as in Fg. 9(b), thc temperature difference
between model A and B can be as large as 2 'C'
at the boundaries of the chip. This is expected because
in reality, the small amount of heat transfer between the
chip and siirrounding ambient does OCCIII. And this difference
wiil increase as the heat transfer coeflicient increases.
Figure 9: Temperature distributions along the x-direction at
(y,z)=(25,5) (unitmesh point) with two different models and
two different hZ's.
Thus we expect the chip temperature to be lower llian in
tlhe worst case model prediction.
To take t,he effect of the pins into account, we can replace
kiackageii i above approximat,ely by
I& = + (1 - X)I<;aekagt (6)
where X=(Area of pins)/(Totai package area). This
means that we can handle the pins or any ot,her packaging
structures of a chip in our sirnulalor simply by using
equation (6).
117. CONCI,USIONS
Complete st,eady-st,ate and transient, teinperature simulator
has been developed to compute temperatures over an
entire chip. Diffprent boundary conditions, cllip layout,
shape of heat sources; power consumption, and pncltagiiig
parameters caii bc applied to this simulator. Mixed 3-D
finite-difference and 1-D equivalent t,liermal circuit siniulator
is used to estimate the packaged chip tcmpcraturc
efficiently. By usiiig t,his simulator. the VLSl chip t,em-
I be predict,ed t80 provide dcsigii guidcliiics for
module placement8 ai I (1 chip packaging .
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Wednesday, December 3, 2008
Overall System Description
Objectives:
The scope of this project is to design an 8 bit microprocessor using VHDL. The design would then be implemented by putting it on an FPGA. The preliminary goal will be to get several commands to work such as mov and add instructions. The desired instructions to be executed and the data to be operated on should be given to the system as inputs. The result of the executed instructions should be the output. After testing the individual parts they will then be combined to test functionality. The final goal is to program an FPGA with the VHDL that is written.
Overall System Description:
The FPGA, once programmed, should behave much the same as an actual microprocessor. This includes an ALU, working registers, and memory. Each part will be designed separately and tested for functionality. After all parts are working they will be combined together forming a simple microprocessor. Figure 1 shows the basic high-level block diagram of the system.
Figure 1 High-level Block Diagram
Figure 1 shows the basic parts that will be designed. The inputs and outputs will be going into and coming out of the FPGA. The registers, ALU, and memory will actually be programmed on the FPGA. The individual parts will be designed separately and then integrated into one system by the use of components or packages in VHDL.
Inputs and Outputs:
It is not decided yet how the final implementation will take in the inputs. To begin with it will simply use different lines high or low to indicate what section is being tested. The instructions will be handled in the same manner. The data that will be operated on will be fed directly into the simulation to begin with. Later different implementations for data and instruction input will be explored such as loading from an EPROM. The outputs will either be the results that are stored in the various registers or various pins will be examined for the expected behavior.
Operations:
There will be several different executable instructions available. The number of them will depend on time constraints and the degree of success with implementing the preliminary instructions. The first instructions that will be implemented will be mov and add. Later additions would possibly include compare instructions, various jumps, logic functions, and other arithmetic operations.
The scope of this project is to design an 8 bit microprocessor using VHDL. The design would then be implemented by putting it on an FPGA. The preliminary goal will be to get several commands to work such as mov and add instructions. The desired instructions to be executed and the data to be operated on should be given to the system as inputs. The result of the executed instructions should be the output. After testing the individual parts they will then be combined to test functionality. The final goal is to program an FPGA with the VHDL that is written.
Overall System Description:
The FPGA, once programmed, should behave much the same as an actual microprocessor. This includes an ALU, working registers, and memory. Each part will be designed separately and tested for functionality. After all parts are working they will be combined together forming a simple microprocessor. Figure 1 shows the basic high-level block diagram of the system.
Figure 1 High-level Block Diagram
Figure 1 shows the basic parts that will be designed. The inputs and outputs will be going into and coming out of the FPGA. The registers, ALU, and memory will actually be programmed on the FPGA. The individual parts will be designed separately and then integrated into one system by the use of components or packages in VHDL.
Inputs and Outputs:
It is not decided yet how the final implementation will take in the inputs. To begin with it will simply use different lines high or low to indicate what section is being tested. The instructions will be handled in the same manner. The data that will be operated on will be fed directly into the simulation to begin with. Later different implementations for data and instruction input will be explored such as loading from an EPROM. The outputs will either be the results that are stored in the various registers or various pins will be examined for the expected behavior.
Operations:
There will be several different executable instructions available. The number of them will depend on time constraints and the degree of success with implementing the preliminary instructions. The first instructions that will be implemented will be mov and add. Later additions would possibly include compare instructions, various jumps, logic functions, and other arithmetic operations.
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IP(10), No. 6, June 2001, pp. 852-864.
IEEE DOI Reference 0106 BibRef
Earlier:
Investigation of parallel and globally convergent iterative schemes for nonlinear variational image smoothing and segmentation,
ICIP98(III: 279-283).
IEEE DOI Reference 9810 BibRef
Maharatna, K., Dhar, A.S., Banerjee, S.[Swapna],
A VLSI array architecture for realization of DFT, DHT, DCT and DST,
SP(81), No. 9, September 2001, pp. 1813-1822.
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CirSysVideo(1), No. 3, September 1991, pp. 241-246.
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CirSysVideo(2), No. 4, December 1992, pp. 392-400.
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Basoglu, C., Lee, W.B.[Woo-Bin], O'Donnell, J.,
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CirSysVideo(12), No. 8, August 2002, pp. 713-718.
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Aziz, M., Boussakta, S., McLernon, D.C.,
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VISP(150), No. 3, June 2003, pp. 133-141.
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CAIP93(813-821).
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Earlier:
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ICPR02(III: 265-268).
IEEE DOI Reference 0211 BibRef
Lu, C.K., Summerfield, S.,
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VISP(151), No. 5, October 2004, pp. 421-427.
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On-chip Computation of Euler Number of a Binary Image for Efficient Database Search,
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ICIP98(III: 279-283).
IEEE DOI Reference 9810 BibRef
Maharatna, K., Dhar, A.S., Banerjee, S.[Swapna],
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IEEE DOI Reference 0402 BibRef
Earlier:
Implementing image applications on FPGAs,
ICPR02(III: 265-268).
IEEE DOI Reference 0211 BibRef
Lu, C.K., Summerfield, S.,
Design and VLSI implementation of QMF banks,
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Generic RAM-Based Architectures for Two-Dimensional Discrete Wavelet Transform With Line-Based Method,
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Artyomov, E., Rivenson, Y., Levi, G., Yadid-Pecht, O.,
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Bishnu, A., Bhattacharya, B.B., Kundu, M.K., Murthy, C.A., Acharya, T.,
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Scalable IC Platform for Smart Cameras,
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Kleihorst, R.P.[Richard P.], Abbo, A.A.[Anteneh A.], Schueler, B.[Ben], Danilin, A.[Alexander],
Camera Mote with a High-Performance Parallel Processor for Real-Time Frame-Based Video Processing,
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Fischer, V.[Viktor], Lukac, R.[Rastislav], Martin, K.[Karl],
Cost-Effective Video Filtering Solution for Real-Time Vision Systems,
JASP(2005), No. 13, 2005, pp. 2026-2042.
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Effective correlation vector quantisation algorithm and its VLSI architecture,
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Bensaali, F., Amira, A.,
Field programmable gate array based parallel matrix multiplier for 3D affine transformations,
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Dang, P.[Philip],
VLSI architecture for real-time image and video processing systems,
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Dandekar, O.[Omkar], Castro-Pareja, C.[Carlos], Shekhar, R.[Raj],
FPGA-based real-time 3D image preprocessing for image-guided medical interventions,
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Saponara, S.[Sergio], Fanucci, L.[Luca], Marsi, S.[Stefano], Ramponi, G.[Giovanni],
Algorithmic and architectural design for real-time and power-efficient Retinex image/video processing,
RealTimeIP(1), No. 4, July 2007, pp. 267-283.
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Saponara, S.[Sergio], Casula, M.[Michele], Fanucci, L.[Luca],
ASIP-based reconfigurable architectures for power-efficient and real-time image/video processing,
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In-Camera Automation of Photographic Composition Rules,
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Cheng, C.C., Huang, C.T., Chen, C.Y., Lian, C.J., Chen, L.G.,
On-Chip Memory Optimization Scheme for VLSI Implementation of Line-Based Two-Dimentional Discrete Wavelet Transform,
CirSysVideo(17), No. 7, July 2007, pp. 814-822.
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Kumaki, T.[Takeshi], Kono, Y.[Yutaka], Ishizaki, M.[Masakatsu], Koide, T.[Tetsushi], Mattausch, H.J.[Hans Jürgen],
Scalable FPGA/ASIC Implementation Architecture for Parallel Table-Lookup-Coding Using Multi-Ported Content Addressable Memory,
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Diaz, I., Heijligers, M., Kleihorst, R.P., Danilin, A.,
An Embedded Low Power High Efficient Object Tracker for Surveillance Systems,
ICDSC07(372-378).
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Litzenberger, M., Belbachir, A.N., Schon, P., Posch, C.,
Embedded Smart Camera for High Speed Vision,
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A Low-Cost, Tiled Embedded Smart Camera System for Computer Vision Applications,
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Vehicle detection at night using image processing and pattern recognition
Husain Abidi, A.S.[Akram S.] * Design concepts for an on-board parallel image processor
Includes: Husain Abidi, A.S.[Akram S.] Husain-Abidi, A.S.[Akram S.]
Husain, M. * Dynamic Object Tracking by Partial Shape Matching for Video Surveillance Applications
Husak, W.[Walt] * Economic and other considerations for Digital Cinema
* Editorial, Video Coding
Huseby, R.B.[Ragnar Bang] * Applications of hidden Markov chains in image analysis
* Combining range and intensity data with a hidden Markov model
* Traffic Surveillance in Real-time using Hidden Markov Models
Includes: Huseby, R.B.[Ragnar Bang] Huseby, R.B.
Huseh, M.Y.[Min Yu] * Image Evaluation Factors
Includes: Huseh, M.Y.[Min Yu] Huseh, M.Y.[Min-Yu]
Husek, D.[Dusan] * Comparison of Neural Network Boolean Factor Analysis Method with Some Other Dimension Reduction Methods on Bars Problem
Includes: Husek, D.[Dusan] Húsek, D.[Dušan]
Husek, M.[Mirek] * Introduction to Categorical Shape Theory, with Applications in Mathematical Morphology
Husemann, P.[Peter] * Automatic Detection of Song Changes in Music Mixes Using Stochastic Models
Husken, M. * Strategies and Benefits of Fusion of 2D and 3D Face Recognition
Husmeier, D.[Dirk] * Bayesian Approaches to Gaussian Mixture Modeling
Husoy, J.H.[J. Hakon] * Compression of image contours using combinatorial optimization
* Detection of clustered microcalcifications in compressed mammograms
* Filter Banks for Texture Segmentation
* Filtering for Texture Classification: A Comparative Study
* Frame Based Representation and Compression of Still Images
* Image Content Search by Color and Texture Properties
* Image Texture Classification with Digital Filter Banks and Transforms
* Least squares image texture analysis and synthesis
* Multi-frame compression: Theory and Design
* Multichannel filtering for image texture segmentation
* Novel Approaches to Multichannel Filtering for image texture segmentation
* Optimal Filter for Detection of Clustered Microcalcifications
* Optimal Filter-Bank Design for Multiple Texture Discrimination
* Optimal texture filtering
* Segmentation of text/image documents using texture approaches
* Sparse Representation of Images using Overlapping Frames
* Texture Segmentation Using Filters with Optimized Energy Separation
* Texture Segmentation with Optimal Linear Prediction Error Filters
Includes: Husoy, J.H.[J. Hakon] Husøy, J.H.[John Håkon] Husøy, J.H. Husoy, J.H.
18 for Husoy, J.H.
Hussain, A. * Intelligibility improvements using binaural diverse sub-band processing applied to speech corrupted with automobile noise
* Texture Classification with Ants
* Theoretic Evidence k-Nearest Neighbourhood Classifiers in a Bimodal Biometric Verification System
Includes: Hussain, A. Hussain, A.[Aini]
Hussain, A.B.S. * Results Obtained Using a Simple Character Recognition Procedure on Munson's Handprinted Data
Hussain, B. * novel feature recognition neural network and its application to character recognition, A
* Real-Time System for Accurate Three-Dimensional Position Determination and Verification
Hussain, I. * Bond Percolation Based Gibbs-Markov Random Fields for Image Segmentation
* Bond Percolation Based Model for Image Segmentation, A
* Segmentation-based nonlinear image smoothing
Hussain, M.[Maria] * Convex Surface Interpolation
* Fast, Simple, Feature Preserving and Memory Efficient Simplification of Triangle Meshes
* Sketch-First Modeling of Buildings from Video Imagery
* User-controlled simplification of polygonal models
* Visual Clustering of Trademarks Using a Component-Based Matching Framework
* Visual Clustering of Trademarks Using the Self-Organizing Map
* Wavelet-based Edge Detection In Digital Images
Includes: Hussain, M.[Maria] Hussain, M.[Muhammad] Hussain, M.[Mushtaq] Hussain, M. Hussain, M.[Mustaq]
7 for Hussain, M.
Hussain, M.Z.[Malik Zawwar] * Convex Surface Interpolation
Hussain, S.[Sajid] * Fast kd-Tree Construction for 3D-Rendering Algorithms Like Ray Tracing
Husse, S. * Image Reconstruction in MRI: Regularized Approach by Markov Random Fields
Hussein, E. * Analysis of Detailed Patterns of Contour Shapes Using Wavelet Local Extrema
Hussein, F. * Genetic algorithms for feature selection and weighting, a review and study
Hussein, K.M. * Detection of Courtesy Amount Block on Bank Checks
* Knowledge-Based Segmentation Algorithm for Enhanced Recognition of Handwritten Courtesy Amounts, A
Includes: Hussein, K.M. Hussein, K.M.[Karim M.]
Hussein, M.[Mohamed] * Kernel integral images: A framework for fast non-uniform filtering
* Real-Time Human Detection, Tracking, and Verification in Uncontrolled Camera Motion Environments
Hussein, Z. * Fast Approximation to a Convex Hull, A
Hussien, B. * Computer-access security systems using keystroke dynamics
* Passive Range Estimation for Rotorcraft Low-Altitude Flight
* Vision-Based Range Estimation Using Helicopter Flight Data
Hussmann, S.[Stephan] * high-speed optical mark reader hardware implementation at low cost using programmable logic, A
* high-speed subpixel edge detector implementation inside a FPGA, A
* Software Algorithm Prototype for Optical Recognition of Embossed Braille, A
Includes: Hussmann, S.[Stephan] Hussmann, S.
Husson, L. * Colour quantisation through dithering techniques
Husson, R. * Vehicle detection at night using image processing and pattern recognition
Hust, A.[Armin] * Improving Document Retrieval by Automatic Query Expansion Using Collaborative Learning of Term-Based Concepts
Huston, D.R. * Cellular-Automata for Image-Analysis of Damage in Large Structures
Huston, L. * Object-based image retrieval using the statistical structure of images
Husz, Z.L.[Zsolt L.] * Human activity recognition with action primitives
* Video Object Tracking Based on a Chamfer Distance Transform
Index for "h"
Includes: Husain Abidi, A.S.[Akram S.] Husain-Abidi, A.S.[Akram S.]
Husain, M. * Dynamic Object Tracking by Partial Shape Matching for Video Surveillance Applications
Husak, W.[Walt] * Economic and other considerations for Digital Cinema
* Editorial, Video Coding
Huseby, R.B.[Ragnar Bang] * Applications of hidden Markov chains in image analysis
* Combining range and intensity data with a hidden Markov model
* Traffic Surveillance in Real-time using Hidden Markov Models
Includes: Huseby, R.B.[Ragnar Bang] Huseby, R.B.
Huseh, M.Y.[Min Yu] * Image Evaluation Factors
Includes: Huseh, M.Y.[Min Yu] Huseh, M.Y.[Min-Yu]
Husek, D.[Dusan] * Comparison of Neural Network Boolean Factor Analysis Method with Some Other Dimension Reduction Methods on Bars Problem
Includes: Husek, D.[Dusan] Húsek, D.[Dušan]
Husek, M.[Mirek] * Introduction to Categorical Shape Theory, with Applications in Mathematical Morphology
Husemann, P.[Peter] * Automatic Detection of Song Changes in Music Mixes Using Stochastic Models
Husken, M. * Strategies and Benefits of Fusion of 2D and 3D Face Recognition
Husmeier, D.[Dirk] * Bayesian Approaches to Gaussian Mixture Modeling
Husoy, J.H.[J. Hakon] * Compression of image contours using combinatorial optimization
* Detection of clustered microcalcifications in compressed mammograms
* Filter Banks for Texture Segmentation
* Filtering for Texture Classification: A Comparative Study
* Frame Based Representation and Compression of Still Images
* Image Content Search by Color and Texture Properties
* Image Texture Classification with Digital Filter Banks and Transforms
* Least squares image texture analysis and synthesis
* Multi-frame compression: Theory and Design
* Multichannel filtering for image texture segmentation
* Novel Approaches to Multichannel Filtering for image texture segmentation
* Optimal Filter for Detection of Clustered Microcalcifications
* Optimal Filter-Bank Design for Multiple Texture Discrimination
* Optimal texture filtering
* Segmentation of text/image documents using texture approaches
* Sparse Representation of Images using Overlapping Frames
* Texture Segmentation Using Filters with Optimized Energy Separation
* Texture Segmentation with Optimal Linear Prediction Error Filters
Includes: Husoy, J.H.[J. Hakon] Husøy, J.H.[John Håkon] Husøy, J.H. Husoy, J.H.
18 for Husoy, J.H.
Hussain, A. * Intelligibility improvements using binaural diverse sub-band processing applied to speech corrupted with automobile noise
* Texture Classification with Ants
* Theoretic Evidence k-Nearest Neighbourhood Classifiers in a Bimodal Biometric Verification System
Includes: Hussain, A. Hussain, A.[Aini]
Hussain, A.B.S. * Results Obtained Using a Simple Character Recognition Procedure on Munson's Handprinted Data
Hussain, B. * novel feature recognition neural network and its application to character recognition, A
* Real-Time System for Accurate Three-Dimensional Position Determination and Verification
Hussain, I. * Bond Percolation Based Gibbs-Markov Random Fields for Image Segmentation
* Bond Percolation Based Model for Image Segmentation, A
* Segmentation-based nonlinear image smoothing
Hussain, M.[Maria] * Convex Surface Interpolation
* Fast, Simple, Feature Preserving and Memory Efficient Simplification of Triangle Meshes
* Sketch-First Modeling of Buildings from Video Imagery
* User-controlled simplification of polygonal models
* Visual Clustering of Trademarks Using a Component-Based Matching Framework
* Visual Clustering of Trademarks Using the Self-Organizing Map
* Wavelet-based Edge Detection In Digital Images
Includes: Hussain, M.[Maria] Hussain, M.[Muhammad] Hussain, M.[Mushtaq] Hussain, M. Hussain, M.[Mustaq]
7 for Hussain, M.
Hussain, M.Z.[Malik Zawwar] * Convex Surface Interpolation
Hussain, S.[Sajid] * Fast kd-Tree Construction for 3D-Rendering Algorithms Like Ray Tracing
Husse, S. * Image Reconstruction in MRI: Regularized Approach by Markov Random Fields
Hussein, E. * Analysis of Detailed Patterns of Contour Shapes Using Wavelet Local Extrema
Hussein, F. * Genetic algorithms for feature selection and weighting, a review and study
Hussein, K.M. * Detection of Courtesy Amount Block on Bank Checks
* Knowledge-Based Segmentation Algorithm for Enhanced Recognition of Handwritten Courtesy Amounts, A
Includes: Hussein, K.M. Hussein, K.M.[Karim M.]
Hussein, M.[Mohamed] * Kernel integral images: A framework for fast non-uniform filtering
* Real-Time Human Detection, Tracking, and Verification in Uncontrolled Camera Motion Environments
Hussein, Z. * Fast Approximation to a Convex Hull, A
Hussien, B. * Computer-access security systems using keystroke dynamics
* Passive Range Estimation for Rotorcraft Low-Altitude Flight
* Vision-Based Range Estimation Using Helicopter Flight Data
Hussmann, S.[Stephan] * high-speed optical mark reader hardware implementation at low cost using programmable logic, A
* high-speed subpixel edge detector implementation inside a FPGA, A
* Software Algorithm Prototype for Optical Recognition of Embossed Braille, A
Includes: Hussmann, S.[Stephan] Hussmann, S.
Husson, L. * Colour quantisation through dithering techniques
Husson, R. * Vehicle detection at night using image processing and pattern recognition
Hust, A.[Armin] * Improving Document Retrieval by Automatic Query Expansion Using Collaborative Learning of Term-Based Concepts
Huston, D.R. * Cellular-Automata for Image-Analysis of Damage in Large Structures
Huston, L. * Object-based image retrieval using the statistical structure of images
Husz, Z.L.[Zsolt L.] * Human activity recognition with action primitives
* Video Object Tracking Based on a Chamfer Distance Transform
Index for "h"
Motion-aided sampling and reconstruction
All, C. * Fast intra mode decision algorithm for H.264/AVC video coding
Allada, V. * Efficient Vertex Detection Algorithms Using the Hough Transform
Allagnat, O. * Hidden Markov fields and unsupervised segmentation of images
Allah, M.M.A. * fast and memory efficient approach for fingerprint authentication system, A
* Novel Line Pattern Algorithm for Embedded Fingerprint Authentication System, A
Includes: Allah, M.M.A. Allah, M.M.A.[Mohamed Mostafa Abd]
Allain, M.[Marc] * Nonparametric Level-Set Segmentation Based on the Minimization of the Stochastic Complexity
* On Global and Local Convergence of Half-Quadratic Algorithms
* Three-dimensional edge-preserving image enhancement for computed tomography
Includes: Allain, M.[Marc] Allain, M.
Allain, P. * Fully automatic identification of AC and PC landmarks on brain MRI using scene analysis
Allaire, S.[Stephane] * Full orientation invariance and improved feature selectivity of 3D SIFT with application to medical image analysis
* Type-Constrained Robust Fitting of Quadrics with Application to the 3D Morphological Characterization of Saddle-Shaped Articular Surfaces
Allalou, A.[Amin] * Image Based Measurements of Single Cell mtDNA Mutation Load
Allan, J. * Automated assessment: How confident are we?
* Automated assessment: it's assessment Jim but not as we know it
* Confident assessment of children's handwritten responses
* Further explorations in text alignment with handwritten documents
* Text alignment with handwritten documents
Includes: Allan, J. Allan, J.[James]
Allan, J.F.[Jean Francois] * Agile Stereo Pair for active vision, The
Includes: Allan, J.F.[Jean Francois] Allan, J.F.[Jean-François]
Allan, M. * Fast Learning of Sprites using Invariant Features
Allano, L.[Lorene] * Generic Protocol for Multibiometric Systems Evaluation on Virtual and Real Subjects, A
* Specific Texture Analysis for Iris Recognition
Includes: Allano, L.[Lorene] Allano, L.[Lorène]
Allaoui, R. * Color Image Segmentation Based Upon a New Statistical Pattern Classification Approach
Allard, D. * Using First- and Second-Order Variograms for Characterizing Landscape Spatial Structures From Remote Sensing Imagery
Allard, J.[Jeremie] * GrImage Platform: A Mixed Reality Environment for Interactions, The
Allard, P. * 3D Terrain Modeling for Rover Localization and Navigation
* FIR filtering approach for the generation of smooth curves on a graphics terminal, A
* Path Planning for Planetary Exploration
Includes: Allard, P. Allard, P.[Paul] Allard, P.[Pierre]
Allart, E. * Functional computer for low level image processing
Allassonniere, S.[Stephanie] * Geodesic Shooting and Diffeomorphic Matching Via Textured Meshes
Includes: Allassonniere, S.[Stephanie] Allassonnière, S.[Stéphanie]
Alldrin, N.[Neil] * Photometric stereo with non-parametric and spatially-varying reflectance
Alldrin, N.G.[Neil G.] * Planar Light Probe, A
* Resolving the Generalized Bas-Relief Ambiguity by Entropy Minimization
* Toward Reconstructing Surfaces With Arbitrary Isotropic Reflectance: A Stratified Photometric Stereo Approach
Allebach, J. * Document Page Classification Algorithm in Copy Pipeline, A
Allebach, J.P.[Jan P.] * Home Page.
* email: Allebach, J.P.[Jan P.]: allebach AT ecn.purdue.edu
* Adaptive Bilateral Filter for Sharpness Enhancement and Noise Removal
* Analysis of Error in Reconstruction of Two-Dimensional Signals from Irregularly Spaced Samples
* Clustered minority pixel error diffusion
* Computer-Aided Design of Clustered-Dot Color Screens Based on a Human Visual System Model
* Digital Color Halftoning
* Dual Interpretation for Direct Binary Search and Its Implications for Tone Reproduction and Texture Quality, A
* Edge-Directed Interpolation
* Efficient Model Based Halftoning Using Direct Binary Search
* Electrophotographic process embedded in direct binary search
* Fast image search using a multiscale stochastic model
* FM screen design using DBS algorithm
* Generating Stochastic Dispersed and Periodic Clustered Textures Using a Composite Hybrid Screen
* Halftone Postprocessing for Improved Highlight Rendition
* Halftoning via direct binary search using analytical and stochastic printer models
* High quality, low complexity halftoning with good compressibility
* Image analysis as a tool for printer characterization and halftoning algorithm development
* Impact of HVS models on model-based halftoning
* Inkjet Printer Model-Based Halftoning
* Look-Up-Table Based Halftoning Algorithm
* Memory efficient error diffusion
* Minimax Method for Function Interpolation Using an SLI Structure, A
* Model based direct binary search halftone optimization with a dual interpretation
* Model-Based Color Halftoning Using Direct Binary Search
* Motion Estimation Based on Time-Sequentially Sampled Imagery
* Multilevel screen design using direct binary search
* New Framework for Characterization of Halftone Textures, A
* Optimal Image Scaling Using Pixel Classification
* Optimal sequential linear interpolation applied to nonlinear color transformations
* Optimization of sensor response functions for colorimetry of reflective and emissive objects
* Quantization of Accumulated Diffused Errors in Error Diffusion
* Sequential Linear Interpolation of Multidimensional Functions
* Sequential scalar quantization of vectors: an analysis
* Special Issue: Digital Color Imaging
* Subspace Matching Color Filter Design Methodology for a Multispectral Imaging System, A
* Tone-dependent error diffusion
* Video and image systems engineering education for the 21st century
* Wavelet decomposition based representation of nonlinear color transformations and comparison with sequential linear interpolation
Includes: Allebach, J.P.[Jan P.] Allebach, J.P.
39 for Allebach, J.P.
Allegre, C.B. * Patterns of macroeconomic indicators preceding the unemployment rise in Western Europe and the USA
Includes: Allegre, C.B. Allègre, C.B.
Allegretti, L. * Retrieval by Spatial Similarity: An Algorithm and a Comparative Evaluation
Allegro, S.[Silvia] * Autofocus for Automated Microassembly under a Microscope
Allen, A.R. * Calibration of a Video Camera Digitising System in the CIE LUV Colour Space
* Fish species recognition by shape analysis of images
* Image Quality Metric Based on a Colour Appearance Model, An
* Image Quality Metric based on Corner, Edge and Symmetry Maps, An
* Method for Working out the Moments of a Polygon, A
* similarity metric for edge images, A
Includes: Allen, A.R. Allen, A.R.[Alastair R.]
Allen, B. * Improved Algorithm for Relational Distance Graph Matching, An
* ply2vri
Includes: Allen, B. Allen, B.[Brett]
Allen, C.R. * Adaptive Classifier Based on K-Means Clustering and Dynamic Programming
* Implementation of a Fast Programmable Edge Detection Preprocessor
* Optimal floating point multiplication processor for signal processing
* Towards a writer-dependent hand-written character recogniser
Includes: Allen, C.R. Allen, C.R.[Charles R.]
Allen, G.H. * Diffuse Edge Fitting and Following: A Location-Adaptive Approach
Allen, G.R. * Design and Use of Special Purpose Processors for the Machine Processing of Remotely Sensed Data, The
Allen, G.S. * Registration of head volume images using implantable fiducial markers
Allen, H.A.[Harriet A.] * Integration, segregation, and binocular combination
Allen, J.B. * Handbook of Emotion Elicitation and Assessment, The
Allen, J.D.[James D.] * Apparatus and method for compressing still images without multiplication
* approach to fast transform coding in software, An
* Optimizing bit-plane context-dependent entropy coding for palettized images
* Very high speed entropy coding
Includes: Allen, J.D.[James D.] Allen, J.D.
Allen, J.F. * Maintaining Knowledge About Time Temporal Intervals
* Towards a General Theory of Action and Time
Includes: Allen, J.F. Allen, J.F.[James F.]
Allen, J.S.[John S.] * Computational Vision: Information Processing in Perception and Visual Behavior
* Introduction to the Non-rigid Image Registration Evaluation Project (NIREP)
Allen, K.M. * Recognition of handwritten foreign mail
Allen, M. * Statistical Processing of Large Image Sequences
Allen, P.D.[P. Daniel] * Building optimal 2D statistical shape models
* cue generator for crack detection, A
* Enhancement of Temporally Variable Features in Nailfold Capillary Patterns
Includes: Allen, P.D.[P. Daniel] Allen, P.D.
Allen, P.K.[Peter K.] * Home Page.
* email: Allen, P.K.[Peter K.]: allen AT cs.columbia.edu
* 3-D Model Construction using Range and Image Data
* 3-D Modeling from Range Imagery: An Incremental Method with a Planning Component
* 3D Modelling from Range Imagery: An Incremental Method with a Planning Component
* Acquisition and Interpretation of 3-D Sensor Data from Touch
* Advanced Visual Sensor Systems
* Advanced Visual Sensor Systems (1998)
* Alignment Using an Uncalibrated Camera System
* Analytical Characterization of the Feature Detectability Constraints of Resolution, Focus, and Field-of-View for Vision Sensor Planning
* Automated Tracking and Grasping of a Moving Object with a Robotic Hand-Eye System
* Automatic Model Acquisition from Range Images with View Planning
* Automatic Registration of 2-D with 3-D Imagery in Urban Environments
* Automating the 3D Modeling Pipeline
* AVENUE: Automated site modeling in urban environments
* Building Illumination Coherent 3D Models of Large-Scale Outdoor Scenes
* CAD Model Acquisition using Binary Space Partitioning Trees
* Closed-Loop Visual Grasping and Manipulation
* Computing Swept Volumes for Sensor Planning Tasks
* Constraint-Based Sensor Planning for Scene Modeling
* Design, Architecture, and Control of a Mobile Site Modeling Robot
* Dynamic Sensor Planning
* Framework for Implementing Multi-Sensor Robotic Tasks, A
* Geometry and Texture Recovery of Scenes of Large Scale
* Haptic Object Recognition Using a Multi-Fingered Dextrous Hand
* Image Understanding and Robotics Research at Columbia University
* Image Understanding Research at Columbia University
* Image-Flow Computation: An Estimation-Theoretic Framework and a Unified Perspective
* Integrating Vision and Touch for Object Recognition Tasks
* Interactive Sensor Planning
* Merging Constraints to Plan Camera Positions and Parameters
* MVP Sensor Planning System for Robotic Vision Tasks, The
* New Methods for Digital Modeling of Historic Sites
* Real-Time Motion Tracking Using Spatio-Temporal Filters
* Real-Time Visual Servoing
* Recovering Illumination and Texture Using Ratio Images
* Registering, Integrating, and Building CAD Models from Range Data
* Relighting acquired models of outdoor scenes
* Robotic Object Recognition Using Vision and Touch
* Robotic System for 3-D Model Acquisition from Multiple Range Images, A
* Seeing into the Past: Creating a 3D Modeling Pipeline for Archaeological Visualization
* Sensor Planning in an Active Robotic Work Cell
* Shadow Based Method for Image to Model Registration, A
* Shadow based texture registration for 3D modeling of outdoor scenes
* Solid Model Construction Using Meshes and Volumes
* Survey of Sensor Planning in Computer Vision, A
* System and Method for Generation of a Three-Dimensional Solid Model
* Trajectory Filtering and Prediction for Automated Tracking and Grasping of a Moving Object
* Two Stage View Planning for Large-Scale Site Modeling
* View Planning for Site Modeling
* Visual Control of Grasping and Manipulation Tasks
* Visual Sensor Systems: Making Them Smaller, Faster, Smarter
Includes: Allen, P.K.[Peter K.] Allen, P.K.
52 for Allen, P.K.
Allen, R. * Automated Segmentation of Lumbar Vertebrae in Digital Videofluoroscopic Images
* Parallel Algorithm for Graph Matching and Its MASPAR Implementation, A
Includes: Allen, R. Allen, R.[Robert]
Allen, R.B.[Robert B.] * Full-text Access to Historical Newspapers
Allen, T. * Automated assessment: How confident are we?
* Automated assessment: it's assessment Jim but not as we know it
* Confident assessment of children's handwritten responses
* Contextual focus for improved recognition of hand-filled forms
* Handwriting style classification
* Prediction of handwriting legibility
* Use of colour in form layout analysis
Includes: Allen, T. Allen, T.[Tony]
7 for Allen, T.
Allen, T.G. * Likelihood-based texture discrimination with multiscale stochastic models
Allen, W. * Matching Motion Trajectories Using Scale-Space
* Recognition Using Motion and Shape
Allen, W.G. * lip-tracking system based on morphological processing and block matching techniques, A
* Ultra fast pattern classification by fuzzy logic
Includes: Allen, W.G. Allen, W.G.[William G.]
Allenbach, J.P. * Fast Image Database Search Using Tree-Structured VQ
Allenbach, M. * Image Analysis for Core Geological Descriptions: Strata and Granulometry Detection
Allende Cid, H.[Hector] * Robust Alternating AdaBoost
* Self-Organizing Neuro-Fuzzy Inference System
Includes: Allende Cid, H.[Hector] Allende-Cid, H.[Héctor]
Allende, H.[Hector] * Bagging with Asymmetric Costs for Misclassified and Correctly Classified Examples
* non-parametric filter for digital image restoration, using cluster analysis, A
* Robust Alternating AdaBoost
* Robust image modeling on image processing
* Robustness Analysis of the Neural Gas Learning Algorithm
* Self-Organizing Neuro-Fuzzy Inference System
Includes: Allende, H.[Hector] Allende, H.[Héctor]
Allene, C.[Cedric] * Image Renaissance Using Discrete Optimization
Alley, R.K.[Richard K.] * Self-Organizing Neural Network that Learns to Detect and Represent Visual Depth from Occlusion Events, A
Alleysson, D.[David] * Efficient Demosaicing Through Recursive Filtering
* Linear Demosaicing Inspired by the Human Visual System
* Model of retinal local adaptation for the tone mapping of color filter array images
* Practical implementation of LMMSE demosaicing using luminance and chrominance spaces
* Visuo-auditory sensory substitution for mobility assistance: Testing TheVIBE
Allezard, N. * Real-time human detection in urban scenes: Local descriptors and classifiers selection with AdaBoost-like algorithms
* Real-Time Humans Detection in Urban Scenes
* Real-Time Posture Analysis in a Crowd using Thermal Imaging
* Recognition of 3d Textured Objects by Mixing View-based and Model-based Representations
Includes: Allezard, N. Allezard, N.[Nicolas]
Allg?wer, B.[Britta] * IPODLAS: A software architecture for coupling temporal simulation systems, VR, and GIS
Allgower, B. * potential of discrete return, small footprint airborne laser scanning data for vegetation density estimation, The
Includes: Allgower, B. Allgöwer, B. (Maybe also Allgoewer, B.)
Allier, B.[Benedicte] * Automatic accurate broken character restoration for patrimonial documents
* Character prototyping in document images using Gabor filters
* Document images analysis solutions for digital libraries
* Segmentation and typography extraction in document images using geodesic active regions
* Texture feature characterization for logical pre-labeling
* Type extraction and character prototyping using gabor filters
Includes: Allier, B.[Benedicte] Allier, B.[Bénédicte] Allier, B.
Alliez, P.[Pierre] * Anisotropic Polygonal Remeshing
* Isotropic Remeshing of Surfaces: A Local Parameterization Approach
* Near-Optimal Connectivity Encoding of 2-Manifold Polygon Meshes
* Recent Advances in Compression of 3D Meshes
* Recent Advances in Remeshing of Surfaces
Allili, M. * computational algebraic topology approach for optical flow, A
* Cubical Homology and the Topological Classification of 2d and 3d Imagery
* Discrete Dynamical System Framework for Construction of Connections between Critical Regions in Lattice Height Data
* Generating cubical complexes from image data and computation of the Euler number
* Morse homology descriptor for shape characterization
* Topological analysis of shapes using Morse theory
Includes: Allili, M. Allili, M.[Madjid]
Allili, M.S.[Mohand Said] * Active contours for video object tracking using region, boundary and shape information
* Adaptive Appearance Model for Object Contour Tracking in Videos
* Automatic Color-Texture Image Segmentation by Using Active Contours
* Automatic Segmentation Combining Mixture Analysis and Adaptive Region Information: A Level Set Approach, An
* Automatic Segmentation of Color Images by Using a Combination of Mixture Modelling and Adaptive Region Information: A Level Set Approach, An
* Finite Generalized Gaussian Mixture Modeling and Applications to Image and Video Foreground Segmentation
* Globally adaptive region information for automatic color-texture image segmentation
* Object Contour Tracking in Videos by Matching Finite Mixture Models
* Object of Interest segmentation and Tracking by Using Feature Selection and Active Contours
* Robust Video Foreground Segmentation by Using Generalized Gaussian Mixture Modeling, A
* Robust Video Object Tracking by Using Active Contours, A
* Using Feature Selection For Object Segmentation and Tracking
Includes: Allili, M.S.[Mohand Said] Allili, M.S.[Mohand Saïd]
12 for Allili, M.S.
Alliney, S. * Digital Analysis of Rotated Images
* Digital Image Registration Using Projections
* On the Registration of an Object Translating on a Static Background
Allinson, N.M. * Automatic Face Representation and Classification
* Bayesian self-organising map for Gaussian mixtures
* Chromosome location and feature extraction using neural networks
* Combining linear filtering and radial basis function networks for accurate profile recovery
* Efficient video compression codebooks using SOM-based vector quantisation
* Face Recognition from Unfamiliar Views: Subspace Methods and Pose Dependency
* Long-term learning in content-based image retrieval
* Matching an Elastic Model of Chromosomal Shape to Features on a Self-Organising Map
* Multitraining Support Vector Machine for Image Retrieval
* Neural Network Approach to Recognition of Structural Aberrations in Chromosomes, A
* Norm^2 Based Face Recognition
* Psychophysically derived quantisation model for efficient DWT image coding
* Self-organised parameter estimation and segmentation of MRF model-based texture images
Includes: Allinson, N.M. Allinson, N.M.[Nigel M.]
13 for Allinson, N.M.
Allison, D.C. * Some Performance Tests of Convex Hull Algorithms
Allison, R.S.[Robert S.] * Egocentric Direction and the Visual Guidance of Robot Locomotion Background, Theory and Implementation
* optical-inertial tracking system for fully-enclosed VR displays, An
Includes: Allison, R.S.[Robert S.] Allison, R.S.
Allman, L. * DCT coding for motion video storage using adaptive arithmetic coding
Allman, M.C.[Mark C.] * Integrated Use of 3-D Site Models and ATR in SAR Image Exploitation
Allmen, M.C.[Mark C.] * email: Allmen, M.C.[Mark C.]: allmen AT ast.lmco.com
* Computation of Cloud-base Height from Paired Whole-Sky Imaging Cameras, The
* Computing Spatiotemporal Relations for Dynamic Perceptual Organization
* Computing Spatiotemporal Surface Flow
* Cyclic Motion Detection Using Spatiotemporal Surfaces and Curves
* Image Sequence Description Using Spatiotemporal Flow Curves: Toward Motion-Based Recognition
* Long-Range Spatiotemporal Motion Understanding Using Spatiotemporal Flow Curves
Includes: Allmen, M.C.[Mark C.] Allmen, M.C.
7 for Allmen, M.C.
Allotta, B. * Affine Visual Servoing for Robot Relative Positioning and Landmark-Based Docking
* Image-Based Robot Task Planning and Control Using a Compact Visual Representation
* On the use of linear camera-object interaction models in visual servoing
Allouche, A. * Motion-aided sampling and reconstruction
Allouche, C. * Efficient model-based quantification of left ventricular function in 3-D echocardiography
Allsop, R.E. * Bayesian analysis for fusion of data from disparate imaging systems for surveillance
Index for "a"
--------------------------------------------------------------------------------
Allada, V. * Efficient Vertex Detection Algorithms Using the Hough Transform
Allagnat, O. * Hidden Markov fields and unsupervised segmentation of images
Allah, M.M.A. * fast and memory efficient approach for fingerprint authentication system, A
* Novel Line Pattern Algorithm for Embedded Fingerprint Authentication System, A
Includes: Allah, M.M.A. Allah, M.M.A.[Mohamed Mostafa Abd]
Allain, M.[Marc] * Nonparametric Level-Set Segmentation Based on the Minimization of the Stochastic Complexity
* On Global and Local Convergence of Half-Quadratic Algorithms
* Three-dimensional edge-preserving image enhancement for computed tomography
Includes: Allain, M.[Marc] Allain, M.
Allain, P. * Fully automatic identification of AC and PC landmarks on brain MRI using scene analysis
Allaire, S.[Stephane] * Full orientation invariance and improved feature selectivity of 3D SIFT with application to medical image analysis
* Type-Constrained Robust Fitting of Quadrics with Application to the 3D Morphological Characterization of Saddle-Shaped Articular Surfaces
Allalou, A.[Amin] * Image Based Measurements of Single Cell mtDNA Mutation Load
Allan, J. * Automated assessment: How confident are we?
* Automated assessment: it's assessment Jim but not as we know it
* Confident assessment of children's handwritten responses
* Further explorations in text alignment with handwritten documents
* Text alignment with handwritten documents
Includes: Allan, J. Allan, J.[James]
Allan, J.F.[Jean Francois] * Agile Stereo Pair for active vision, The
Includes: Allan, J.F.[Jean Francois] Allan, J.F.[Jean-François]
Allan, M. * Fast Learning of Sprites using Invariant Features
Allano, L.[Lorene] * Generic Protocol for Multibiometric Systems Evaluation on Virtual and Real Subjects, A
* Specific Texture Analysis for Iris Recognition
Includes: Allano, L.[Lorene] Allano, L.[Lorène]
Allaoui, R. * Color Image Segmentation Based Upon a New Statistical Pattern Classification Approach
Allard, D. * Using First- and Second-Order Variograms for Characterizing Landscape Spatial Structures From Remote Sensing Imagery
Allard, J.[Jeremie] * GrImage Platform: A Mixed Reality Environment for Interactions, The
Allard, P. * 3D Terrain Modeling for Rover Localization and Navigation
* FIR filtering approach for the generation of smooth curves on a graphics terminal, A
* Path Planning for Planetary Exploration
Includes: Allard, P. Allard, P.[Paul] Allard, P.[Pierre]
Allart, E. * Functional computer for low level image processing
Allassonniere, S.[Stephanie] * Geodesic Shooting and Diffeomorphic Matching Via Textured Meshes
Includes: Allassonniere, S.[Stephanie] Allassonnière, S.[Stéphanie]
Alldrin, N.[Neil] * Photometric stereo with non-parametric and spatially-varying reflectance
Alldrin, N.G.[Neil G.] * Planar Light Probe, A
* Resolving the Generalized Bas-Relief Ambiguity by Entropy Minimization
* Toward Reconstructing Surfaces With Arbitrary Isotropic Reflectance: A Stratified Photometric Stereo Approach
Allebach, J. * Document Page Classification Algorithm in Copy Pipeline, A
Allebach, J.P.[Jan P.] * Home Page.
* email: Allebach, J.P.[Jan P.]: allebach AT ecn.purdue.edu
* Adaptive Bilateral Filter for Sharpness Enhancement and Noise Removal
* Analysis of Error in Reconstruction of Two-Dimensional Signals from Irregularly Spaced Samples
* Clustered minority pixel error diffusion
* Computer-Aided Design of Clustered-Dot Color Screens Based on a Human Visual System Model
* Digital Color Halftoning
* Dual Interpretation for Direct Binary Search and Its Implications for Tone Reproduction and Texture Quality, A
* Edge-Directed Interpolation
* Efficient Model Based Halftoning Using Direct Binary Search
* Electrophotographic process embedded in direct binary search
* Fast image search using a multiscale stochastic model
* FM screen design using DBS algorithm
* Generating Stochastic Dispersed and Periodic Clustered Textures Using a Composite Hybrid Screen
* Halftone Postprocessing for Improved Highlight Rendition
* Halftoning via direct binary search using analytical and stochastic printer models
* High quality, low complexity halftoning with good compressibility
* Image analysis as a tool for printer characterization and halftoning algorithm development
* Impact of HVS models on model-based halftoning
* Inkjet Printer Model-Based Halftoning
* Look-Up-Table Based Halftoning Algorithm
* Memory efficient error diffusion
* Minimax Method for Function Interpolation Using an SLI Structure, A
* Model based direct binary search halftone optimization with a dual interpretation
* Model-Based Color Halftoning Using Direct Binary Search
* Motion Estimation Based on Time-Sequentially Sampled Imagery
* Multilevel screen design using direct binary search
* New Framework for Characterization of Halftone Textures, A
* Optimal Image Scaling Using Pixel Classification
* Optimal sequential linear interpolation applied to nonlinear color transformations
* Optimization of sensor response functions for colorimetry of reflective and emissive objects
* Quantization of Accumulated Diffused Errors in Error Diffusion
* Sequential Linear Interpolation of Multidimensional Functions
* Sequential scalar quantization of vectors: an analysis
* Special Issue: Digital Color Imaging
* Subspace Matching Color Filter Design Methodology for a Multispectral Imaging System, A
* Tone-dependent error diffusion
* Video and image systems engineering education for the 21st century
* Wavelet decomposition based representation of nonlinear color transformations and comparison with sequential linear interpolation
Includes: Allebach, J.P.[Jan P.] Allebach, J.P.
39 for Allebach, J.P.
Allegre, C.B. * Patterns of macroeconomic indicators preceding the unemployment rise in Western Europe and the USA
Includes: Allegre, C.B. Allègre, C.B.
Allegretti, L. * Retrieval by Spatial Similarity: An Algorithm and a Comparative Evaluation
Allegro, S.[Silvia] * Autofocus for Automated Microassembly under a Microscope
Allen, A.R. * Calibration of a Video Camera Digitising System in the CIE LUV Colour Space
* Fish species recognition by shape analysis of images
* Image Quality Metric Based on a Colour Appearance Model, An
* Image Quality Metric based on Corner, Edge and Symmetry Maps, An
* Method for Working out the Moments of a Polygon, A
* similarity metric for edge images, A
Includes: Allen, A.R. Allen, A.R.[Alastair R.]
Allen, B. * Improved Algorithm for Relational Distance Graph Matching, An
* ply2vri
Includes: Allen, B. Allen, B.[Brett]
Allen, C.R. * Adaptive Classifier Based on K-Means Clustering and Dynamic Programming
* Implementation of a Fast Programmable Edge Detection Preprocessor
* Optimal floating point multiplication processor for signal processing
* Towards a writer-dependent hand-written character recogniser
Includes: Allen, C.R. Allen, C.R.[Charles R.]
Allen, G.H. * Diffuse Edge Fitting and Following: A Location-Adaptive Approach
Allen, G.R. * Design and Use of Special Purpose Processors for the Machine Processing of Remotely Sensed Data, The
Allen, G.S. * Registration of head volume images using implantable fiducial markers
Allen, H.A.[Harriet A.] * Integration, segregation, and binocular combination
Allen, J.B. * Handbook of Emotion Elicitation and Assessment, The
Allen, J.D.[James D.] * Apparatus and method for compressing still images without multiplication
* approach to fast transform coding in software, An
* Optimizing bit-plane context-dependent entropy coding for palettized images
* Very high speed entropy coding
Includes: Allen, J.D.[James D.] Allen, J.D.
Allen, J.F. * Maintaining Knowledge About Time Temporal Intervals
* Towards a General Theory of Action and Time
Includes: Allen, J.F. Allen, J.F.[James F.]
Allen, J.S.[John S.] * Computational Vision: Information Processing in Perception and Visual Behavior
* Introduction to the Non-rigid Image Registration Evaluation Project (NIREP)
Allen, K.M. * Recognition of handwritten foreign mail
Allen, M. * Statistical Processing of Large Image Sequences
Allen, P.D.[P. Daniel] * Building optimal 2D statistical shape models
* cue generator for crack detection, A
* Enhancement of Temporally Variable Features in Nailfold Capillary Patterns
Includes: Allen, P.D.[P. Daniel] Allen, P.D.
Allen, P.K.[Peter K.] * Home Page.
* email: Allen, P.K.[Peter K.]: allen AT cs.columbia.edu
* 3-D Model Construction using Range and Image Data
* 3-D Modeling from Range Imagery: An Incremental Method with a Planning Component
* 3D Modelling from Range Imagery: An Incremental Method with a Planning Component
* Acquisition and Interpretation of 3-D Sensor Data from Touch
* Advanced Visual Sensor Systems
* Advanced Visual Sensor Systems (1998)
* Alignment Using an Uncalibrated Camera System
* Analytical Characterization of the Feature Detectability Constraints of Resolution, Focus, and Field-of-View for Vision Sensor Planning
* Automated Tracking and Grasping of a Moving Object with a Robotic Hand-Eye System
* Automatic Model Acquisition from Range Images with View Planning
* Automatic Registration of 2-D with 3-D Imagery in Urban Environments
* Automating the 3D Modeling Pipeline
* AVENUE: Automated site modeling in urban environments
* Building Illumination Coherent 3D Models of Large-Scale Outdoor Scenes
* CAD Model Acquisition using Binary Space Partitioning Trees
* Closed-Loop Visual Grasping and Manipulation
* Computing Swept Volumes for Sensor Planning Tasks
* Constraint-Based Sensor Planning for Scene Modeling
* Design, Architecture, and Control of a Mobile Site Modeling Robot
* Dynamic Sensor Planning
* Framework for Implementing Multi-Sensor Robotic Tasks, A
* Geometry and Texture Recovery of Scenes of Large Scale
* Haptic Object Recognition Using a Multi-Fingered Dextrous Hand
* Image Understanding and Robotics Research at Columbia University
* Image Understanding Research at Columbia University
* Image-Flow Computation: An Estimation-Theoretic Framework and a Unified Perspective
* Integrating Vision and Touch for Object Recognition Tasks
* Interactive Sensor Planning
* Merging Constraints to Plan Camera Positions and Parameters
* MVP Sensor Planning System for Robotic Vision Tasks, The
* New Methods for Digital Modeling of Historic Sites
* Real-Time Motion Tracking Using Spatio-Temporal Filters
* Real-Time Visual Servoing
* Recovering Illumination and Texture Using Ratio Images
* Registering, Integrating, and Building CAD Models from Range Data
* Relighting acquired models of outdoor scenes
* Robotic Object Recognition Using Vision and Touch
* Robotic System for 3-D Model Acquisition from Multiple Range Images, A
* Seeing into the Past: Creating a 3D Modeling Pipeline for Archaeological Visualization
* Sensor Planning in an Active Robotic Work Cell
* Shadow Based Method for Image to Model Registration, A
* Shadow based texture registration for 3D modeling of outdoor scenes
* Solid Model Construction Using Meshes and Volumes
* Survey of Sensor Planning in Computer Vision, A
* System and Method for Generation of a Three-Dimensional Solid Model
* Trajectory Filtering and Prediction for Automated Tracking and Grasping of a Moving Object
* Two Stage View Planning for Large-Scale Site Modeling
* View Planning for Site Modeling
* Visual Control of Grasping and Manipulation Tasks
* Visual Sensor Systems: Making Them Smaller, Faster, Smarter
Includes: Allen, P.K.[Peter K.] Allen, P.K.
52 for Allen, P.K.
Allen, R. * Automated Segmentation of Lumbar Vertebrae in Digital Videofluoroscopic Images
* Parallel Algorithm for Graph Matching and Its MASPAR Implementation, A
Includes: Allen, R. Allen, R.[Robert]
Allen, R.B.[Robert B.] * Full-text Access to Historical Newspapers
Allen, T. * Automated assessment: How confident are we?
* Automated assessment: it's assessment Jim but not as we know it
* Confident assessment of children's handwritten responses
* Contextual focus for improved recognition of hand-filled forms
* Handwriting style classification
* Prediction of handwriting legibility
* Use of colour in form layout analysis
Includes: Allen, T. Allen, T.[Tony]
7 for Allen, T.
Allen, T.G. * Likelihood-based texture discrimination with multiscale stochastic models
Allen, W. * Matching Motion Trajectories Using Scale-Space
* Recognition Using Motion and Shape
Allen, W.G. * lip-tracking system based on morphological processing and block matching techniques, A
* Ultra fast pattern classification by fuzzy logic
Includes: Allen, W.G. Allen, W.G.[William G.]
Allenbach, J.P. * Fast Image Database Search Using Tree-Structured VQ
Allenbach, M. * Image Analysis for Core Geological Descriptions: Strata and Granulometry Detection
Allende Cid, H.[Hector] * Robust Alternating AdaBoost
* Self-Organizing Neuro-Fuzzy Inference System
Includes: Allende Cid, H.[Hector] Allende-Cid, H.[Héctor]
Allende, H.[Hector] * Bagging with Asymmetric Costs for Misclassified and Correctly Classified Examples
* non-parametric filter for digital image restoration, using cluster analysis, A
* Robust Alternating AdaBoost
* Robust image modeling on image processing
* Robustness Analysis of the Neural Gas Learning Algorithm
* Self-Organizing Neuro-Fuzzy Inference System
Includes: Allende, H.[Hector] Allende, H.[Héctor]
Allene, C.[Cedric] * Image Renaissance Using Discrete Optimization
Alley, R.K.[Richard K.] * Self-Organizing Neural Network that Learns to Detect and Represent Visual Depth from Occlusion Events, A
Alleysson, D.[David] * Efficient Demosaicing Through Recursive Filtering
* Linear Demosaicing Inspired by the Human Visual System
* Model of retinal local adaptation for the tone mapping of color filter array images
* Practical implementation of LMMSE demosaicing using luminance and chrominance spaces
* Visuo-auditory sensory substitution for mobility assistance: Testing TheVIBE
Allezard, N. * Real-time human detection in urban scenes: Local descriptors and classifiers selection with AdaBoost-like algorithms
* Real-Time Humans Detection in Urban Scenes
* Real-Time Posture Analysis in a Crowd using Thermal Imaging
* Recognition of 3d Textured Objects by Mixing View-based and Model-based Representations
Includes: Allezard, N. Allezard, N.[Nicolas]
Allg?wer, B.[Britta] * IPODLAS: A software architecture for coupling temporal simulation systems, VR, and GIS
Allgower, B. * potential of discrete return, small footprint airborne laser scanning data for vegetation density estimation, The
Includes: Allgower, B. Allgöwer, B. (Maybe also Allgoewer, B.)
Allier, B.[Benedicte] * Automatic accurate broken character restoration for patrimonial documents
* Character prototyping in document images using Gabor filters
* Document images analysis solutions for digital libraries
* Segmentation and typography extraction in document images using geodesic active regions
* Texture feature characterization for logical pre-labeling
* Type extraction and character prototyping using gabor filters
Includes: Allier, B.[Benedicte] Allier, B.[Bénédicte] Allier, B.
Alliez, P.[Pierre] * Anisotropic Polygonal Remeshing
* Isotropic Remeshing of Surfaces: A Local Parameterization Approach
* Near-Optimal Connectivity Encoding of 2-Manifold Polygon Meshes
* Recent Advances in Compression of 3D Meshes
* Recent Advances in Remeshing of Surfaces
Allili, M. * computational algebraic topology approach for optical flow, A
* Cubical Homology and the Topological Classification of 2d and 3d Imagery
* Discrete Dynamical System Framework for Construction of Connections between Critical Regions in Lattice Height Data
* Generating cubical complexes from image data and computation of the Euler number
* Morse homology descriptor for shape characterization
* Topological analysis of shapes using Morse theory
Includes: Allili, M. Allili, M.[Madjid]
Allili, M.S.[Mohand Said] * Active contours for video object tracking using region, boundary and shape information
* Adaptive Appearance Model for Object Contour Tracking in Videos
* Automatic Color-Texture Image Segmentation by Using Active Contours
* Automatic Segmentation Combining Mixture Analysis and Adaptive Region Information: A Level Set Approach, An
* Automatic Segmentation of Color Images by Using a Combination of Mixture Modelling and Adaptive Region Information: A Level Set Approach, An
* Finite Generalized Gaussian Mixture Modeling and Applications to Image and Video Foreground Segmentation
* Globally adaptive region information for automatic color-texture image segmentation
* Object Contour Tracking in Videos by Matching Finite Mixture Models
* Object of Interest segmentation and Tracking by Using Feature Selection and Active Contours
* Robust Video Foreground Segmentation by Using Generalized Gaussian Mixture Modeling, A
* Robust Video Object Tracking by Using Active Contours, A
* Using Feature Selection For Object Segmentation and Tracking
Includes: Allili, M.S.[Mohand Said] Allili, M.S.[Mohand Saïd]
12 for Allili, M.S.
Alliney, S. * Digital Analysis of Rotated Images
* Digital Image Registration Using Projections
* On the Registration of an Object Translating on a Static Background
Allinson, N.M. * Automatic Face Representation and Classification
* Bayesian self-organising map for Gaussian mixtures
* Chromosome location and feature extraction using neural networks
* Combining linear filtering and radial basis function networks for accurate profile recovery
* Efficient video compression codebooks using SOM-based vector quantisation
* Face Recognition from Unfamiliar Views: Subspace Methods and Pose Dependency
* Long-term learning in content-based image retrieval
* Matching an Elastic Model of Chromosomal Shape to Features on a Self-Organising Map
* Multitraining Support Vector Machine for Image Retrieval
* Neural Network Approach to Recognition of Structural Aberrations in Chromosomes, A
* Norm^2 Based Face Recognition
* Psychophysically derived quantisation model for efficient DWT image coding
* Self-organised parameter estimation and segmentation of MRF model-based texture images
Includes: Allinson, N.M. Allinson, N.M.[Nigel M.]
13 for Allinson, N.M.
Allison, D.C. * Some Performance Tests of Convex Hull Algorithms
Allison, R.S.[Robert S.] * Egocentric Direction and the Visual Guidance of Robot Locomotion Background, Theory and Implementation
* optical-inertial tracking system for fully-enclosed VR displays, An
Includes: Allison, R.S.[Robert S.] Allison, R.S.
Allman, L. * DCT coding for motion video storage using adaptive arithmetic coding
Allman, M.C.[Mark C.] * Integrated Use of 3-D Site Models and ATR in SAR Image Exploitation
Allmen, M.C.[Mark C.] * email: Allmen, M.C.[Mark C.]: allmen AT ast.lmco.com
* Computation of Cloud-base Height from Paired Whole-Sky Imaging Cameras, The
* Computing Spatiotemporal Relations for Dynamic Perceptual Organization
* Computing Spatiotemporal Surface Flow
* Cyclic Motion Detection Using Spatiotemporal Surfaces and Curves
* Image Sequence Description Using Spatiotemporal Flow Curves: Toward Motion-Based Recognition
* Long-Range Spatiotemporal Motion Understanding Using Spatiotemporal Flow Curves
Includes: Allmen, M.C.[Mark C.] Allmen, M.C.
7 for Allmen, M.C.
Allotta, B. * Affine Visual Servoing for Robot Relative Positioning and Landmark-Based Docking
* Image-Based Robot Task Planning and Control Using a Compact Visual Representation
* On the use of linear camera-object interaction models in visual servoing
Allouche, A. * Motion-aided sampling and reconstruction
Allouche, C. * Efficient model-based quantification of left ventricular function in 3-D echocardiography
Allsop, R.E. * Bayesian analysis for fusion of data from disparate imaging systems for surveillance
Index for "a"
--------------------------------------------------------------------------------
Temporal Bayesian Network based contextual
Pagalthivarthi, K.V.[Krishnan V.] * Temporal Bayesian Network based contextual framework for structured information mining
Pagani, A.[Alain] * Architecture for Prototyping and Application Development of Visual Tracking Systems, An
* Feature Management for Efficient Camera Tracking
* New Merit Version for MPEG-2 Encoded Files, A
Pagani, M. * Classification of Functional Patterns in SPECT Brain Scans Based on Partial Least Squares Analysis
Paganin, D.M.[David M.] * Stability of phase-contrast tomography
Pagano, T.S. * Prelaunch and in-flight radiometric calibration of the atmospheric infrared sounder (AIRS)
Page, C. * Region-Based Approach to Digital Image Registration with Subpixel Accuracy, A
Page, C.V. * Augmented Relaxation Labeling and Dynamic Relaxation Labeling
Page, D.[David] * Heterogeneous Fusion of Omnidirectional and PTZ Cameras for Multiple Object Tracking
* Sensor planning for automated and persistent object tracking with multiple cameras
Page, D.L.[David L.] * Automated Scene-Specific Selection of Feature Detectors for 3D Face Reconstruction
* Combinational Approach to the Fusion, De-noising and Enhancement of Dual-Energy X-Ray Luggage Images, A
* Gray-Level Grouping (GLG): An Automatic Method for Optimized Image Contrast Enhancement -- Part I: The Basic Method
* Gray-Level Grouping (GLG): An Automatic Method for Optimized Image Contrast Enhancement -- Part II: The Variations
* Linking Feature Lines on 3D Triangle Meshes with Artificial Potential Fields
* Moving Object Tracked by A Mobile Robot with Real-Time Obstacles Avoidance Capacity, A
* MuFeSaC: Learning When to Use Which Feature Detector
* Normal Vector Voting: Crease Detection and Curvature Estimation on Large, Noisy Meshes
* Objective Image Quality Evaluation for JPEG, JPEG 2000, and Vidware VisionTM
* On handling uncertainty in the fundamental matrix for scene and motion adaptive pose recovery
* Perception-based 3D triangle mesh segmentation using fast marching watersheds
* Point fingerprint: A new 3-D object representation scheme
* Robust Crease Detection and Curvature Estimation of Piecewise Smooth Surfaces from Triangle Mesh Approximations Using Normal Voting
* Shape analysis algorithm based on information theory
* Shape Measure for Identifying Perceptually Informative Parts of 3D Objects
* Simultaneous mesh simplification and noise smoothing of range images
* Towards understanding what makes 3D objects appear simple or complex
* Triangle mesh-based edge detection and its application to surface segmentation and adaptive surface smoothing
* Triangle mesh-based surface modeling using adaptive smoothing and implicit surface texture integration
Includes: Page, D.L.[David L.] Page, D.L.
19 for Page, D.L.
Page, G.J. * Check: A Generic and Specific Industrial Inspection Tool
* Statistical Grey-Level Models for Object Location and Identification
Page, I. * fast algorithm for computing optic flow and its implementation on a Transputer array, A
Page, K.J.[Kenneth John] * Water Body Detection and Delineation with Landsat TM Data
Page, V.[Vincent] * Detection of objects composed of several regions by a region-configuration-estimation method
* Grouping with bias for distribution-free mixture model estimation
* Matching two clusters of points extracted from satellite images
Includes: Page, V.[Vincent] Page, V.
Pagel, M. * Self-Calibration of the Fixation Movement of a Stereo Camera Head
Pagello, E. * Cooperation Issues and Distributed Sensing for Multirobot Systems
Pages, J.[Jordi] * Camera-Projector System for Robot Positioning by Visual Servoing, A
* Implementation of a robust coded structured light technique for dynamic 3D measurements
* new optimised de_Bruijn coding strategy for structured light patterns, A
* Optimised De Bruijn patterns for one-shot shape acquisition
* Pattern codification strategies in structured light systems
* Survey Addressing the Fundamental Matrix Estimation Problem, A
Includes: Pages, J.[Jordi] Pages, J. Pagès, J.[Jordi] Pagés, J.
Paget, R. * Automatic) Target Detection in Synthetic Aperture Radar Imagery Via Terrain Recognition
* Extracting the Cliques from a Neighborhood System
* Nonparametric Markov Random Field Model Analysis of the MeasTex Test Suite
* Open-ended Texture Classification for Terrain Mapping
* Strong Markov Random Field Model
* Texture Synthesis and Unsupervised Recognition with a Nonparametric Multiscale Markov Random Field Model
* Texture Synthesis via a Noncausal Nonparametric Multiscale Markov Random Field
Includes: Paget, R. Paget, R.[Rupert]
7 for Paget, R.
Pagli, L. * VLSI Solution to the Vertical Segment Visibility Problem, A
Pagliano, S. * Recognition Experiments of Cursive Dynamic Handwriting with Self-Organizing Networks
Pagliardi, M.[Matteo] * Automatic Mask Extraction for PIV-Based Dam-Break Analysis
* Dry Granular Flows Need Special Tools
Pagliari, C.L.[Carla L.] * Multi-Viewpoint Synthesis from Uncalibrated Stereo Cameras
* Multiscale recurrent patterns applied to stereo image coding
* Reconstruction of intermediate views from stereoscopic images using a rational filter
* Statistical Analyses of Disparity Maps and Disparity Compensated Residuals in the Presence of Occlusions
* Stereo Disparity Computation in the DCT Domain Using Genetic Algorithms
* Stereo image coding using multiscale recurrent patterns
Includes: Pagliari, C.L.[Carla L.] Pagliari, C.L.
Paglieroni, D.W. * Control Point Transforms for Shape Representation and Measurement
* Design considerations for image segmentation quality assessment measures
* Distance Transforms: Properties and Machine Vision Applications
* Fast Classification Of Discrete Shape Contours
* Matching Flexible Polygons to Fields of Corners Extracted from Images
* Position-Orientation Masking Approach To Parametric Search For Template Matching, The
* Unified Distance Transform Algorithm and Architecture, A
Includes: Paglieroni, D.W. Paglieroni, D.W.[David W.]
7 for Paglieroni, D.W.
Pagnan, S. * Noisy Texture Classification: A Higher Order Statistics Approach
* Robust features for textures in additive noise
Pagnutti, M. * NASA's Earth Science Use of Commercially Available Remote Sensing Datasets
* Radiometric characterization of IKONOS multispectral imagery
Includes: Pagnutti, M. Pagnutti, M.[Mary]
Pagola, J.E.M.[Jose E. Medina] * ACONS: A New Algorithm for Clustering Documents
* Formal Distance vs. Association Strength in Text Processing
* TextLec: A Novel Method of Segmentation by Topic Using Lower Windows and Lexical Cohesion
Includes: Pagola, J.E.M.[Jose E. Medina] Pagola, J.E.M.[José E. Medina]
Pagola, M. * Relationship between restricted dissimilarity functions, restricted equivalence functions and normal EN-functions: Image thresholding invariant
Pagot, E. * Moving Targets Velocity and Direction Estimation by Using a Single Optical VHR Satellite Imagery
Index for "p"
--------------------------------------------------------------------------------
Pagani, A.[Alain] * Architecture for Prototyping and Application Development of Visual Tracking Systems, An
* Feature Management for Efficient Camera Tracking
* New Merit Version for MPEG-2 Encoded Files, A
Pagani, M. * Classification of Functional Patterns in SPECT Brain Scans Based on Partial Least Squares Analysis
Paganin, D.M.[David M.] * Stability of phase-contrast tomography
Pagano, T.S. * Prelaunch and in-flight radiometric calibration of the atmospheric infrared sounder (AIRS)
Page, C. * Region-Based Approach to Digital Image Registration with Subpixel Accuracy, A
Page, C.V. * Augmented Relaxation Labeling and Dynamic Relaxation Labeling
Page, D.[David] * Heterogeneous Fusion of Omnidirectional and PTZ Cameras for Multiple Object Tracking
* Sensor planning for automated and persistent object tracking with multiple cameras
Page, D.L.[David L.] * Automated Scene-Specific Selection of Feature Detectors for 3D Face Reconstruction
* Combinational Approach to the Fusion, De-noising and Enhancement of Dual-Energy X-Ray Luggage Images, A
* Gray-Level Grouping (GLG): An Automatic Method for Optimized Image Contrast Enhancement -- Part I: The Basic Method
* Gray-Level Grouping (GLG): An Automatic Method for Optimized Image Contrast Enhancement -- Part II: The Variations
* Linking Feature Lines on 3D Triangle Meshes with Artificial Potential Fields
* Moving Object Tracked by A Mobile Robot with Real-Time Obstacles Avoidance Capacity, A
* MuFeSaC: Learning When to Use Which Feature Detector
* Normal Vector Voting: Crease Detection and Curvature Estimation on Large, Noisy Meshes
* Objective Image Quality Evaluation for JPEG, JPEG 2000, and Vidware VisionTM
* On handling uncertainty in the fundamental matrix for scene and motion adaptive pose recovery
* Perception-based 3D triangle mesh segmentation using fast marching watersheds
* Point fingerprint: A new 3-D object representation scheme
* Robust Crease Detection and Curvature Estimation of Piecewise Smooth Surfaces from Triangle Mesh Approximations Using Normal Voting
* Shape analysis algorithm based on information theory
* Shape Measure for Identifying Perceptually Informative Parts of 3D Objects
* Simultaneous mesh simplification and noise smoothing of range images
* Towards understanding what makes 3D objects appear simple or complex
* Triangle mesh-based edge detection and its application to surface segmentation and adaptive surface smoothing
* Triangle mesh-based surface modeling using adaptive smoothing and implicit surface texture integration
Includes: Page, D.L.[David L.] Page, D.L.
19 for Page, D.L.
Page, G.J. * Check: A Generic and Specific Industrial Inspection Tool
* Statistical Grey-Level Models for Object Location and Identification
Page, I. * fast algorithm for computing optic flow and its implementation on a Transputer array, A
Page, K.J.[Kenneth John] * Water Body Detection and Delineation with Landsat TM Data
Page, V.[Vincent] * Detection of objects composed of several regions by a region-configuration-estimation method
* Grouping with bias for distribution-free mixture model estimation
* Matching two clusters of points extracted from satellite images
Includes: Page, V.[Vincent] Page, V.
Pagel, M. * Self-Calibration of the Fixation Movement of a Stereo Camera Head
Pagello, E. * Cooperation Issues and Distributed Sensing for Multirobot Systems
Pages, J.[Jordi] * Camera-Projector System for Robot Positioning by Visual Servoing, A
* Implementation of a robust coded structured light technique for dynamic 3D measurements
* new optimised de_Bruijn coding strategy for structured light patterns, A
* Optimised De Bruijn patterns for one-shot shape acquisition
* Pattern codification strategies in structured light systems
* Survey Addressing the Fundamental Matrix Estimation Problem, A
Includes: Pages, J.[Jordi] Pages, J. Pagès, J.[Jordi] Pagés, J.
Paget, R. * Automatic) Target Detection in Synthetic Aperture Radar Imagery Via Terrain Recognition
* Extracting the Cliques from a Neighborhood System
* Nonparametric Markov Random Field Model Analysis of the MeasTex Test Suite
* Open-ended Texture Classification for Terrain Mapping
* Strong Markov Random Field Model
* Texture Synthesis and Unsupervised Recognition with a Nonparametric Multiscale Markov Random Field Model
* Texture Synthesis via a Noncausal Nonparametric Multiscale Markov Random Field
Includes: Paget, R. Paget, R.[Rupert]
7 for Paget, R.
Pagli, L. * VLSI Solution to the Vertical Segment Visibility Problem, A
Pagliano, S. * Recognition Experiments of Cursive Dynamic Handwriting with Self-Organizing Networks
Pagliardi, M.[Matteo] * Automatic Mask Extraction for PIV-Based Dam-Break Analysis
* Dry Granular Flows Need Special Tools
Pagliari, C.L.[Carla L.] * Multi-Viewpoint Synthesis from Uncalibrated Stereo Cameras
* Multiscale recurrent patterns applied to stereo image coding
* Reconstruction of intermediate views from stereoscopic images using a rational filter
* Statistical Analyses of Disparity Maps and Disparity Compensated Residuals in the Presence of Occlusions
* Stereo Disparity Computation in the DCT Domain Using Genetic Algorithms
* Stereo image coding using multiscale recurrent patterns
Includes: Pagliari, C.L.[Carla L.] Pagliari, C.L.
Paglieroni, D.W. * Control Point Transforms for Shape Representation and Measurement
* Design considerations for image segmentation quality assessment measures
* Distance Transforms: Properties and Machine Vision Applications
* Fast Classification Of Discrete Shape Contours
* Matching Flexible Polygons to Fields of Corners Extracted from Images
* Position-Orientation Masking Approach To Parametric Search For Template Matching, The
* Unified Distance Transform Algorithm and Architecture, A
Includes: Paglieroni, D.W. Paglieroni, D.W.[David W.]
7 for Paglieroni, D.W.
Pagnan, S. * Noisy Texture Classification: A Higher Order Statistics Approach
* Robust features for textures in additive noise
Pagnutti, M. * NASA's Earth Science Use of Commercially Available Remote Sensing Datasets
* Radiometric characterization of IKONOS multispectral imagery
Includes: Pagnutti, M. Pagnutti, M.[Mary]
Pagola, J.E.M.[Jose E. Medina] * ACONS: A New Algorithm for Clustering Documents
* Formal Distance vs. Association Strength in Text Processing
* TextLec: A Novel Method of Segmentation by Topic Using Lower Windows and Lexical Cohesion
Includes: Pagola, J.E.M.[Jose E. Medina] Pagola, J.E.M.[José E. Medina]
Pagola, M. * Relationship between restricted dissimilarity functions, restricted equivalence functions and normal EN-functions: Image thresholding invariant
Pagot, E. * Moving Targets Velocity and Direction Estimation by Using a Single Optical VHR Satellite Imagery
Index for "p"
--------------------------------------------------------------------------------
Temporal Bayesian Network based contextual
Pagalthivarthi, K.V.[Krishnan V.] * Temporal Bayesian Network based contextual framework for structured information mining
Pagani, A.[Alain] * Architecture for Prototyping and Application Development of Visual Tracking Systems, An
* Feature Management for Efficient Camera Tracking
* New Merit Version for MPEG-2 Encoded Files, A
Pagani, M. * Classification of Functional Patterns in SPECT Brain Scans Based on Partial Least Squares Analysis
Paganin, D.M.[David M.] * Stability of phase-contrast tomography
Pagano, T.S. * Prelaunch and in-flight radiometric calibration of the atmospheric infrared sounder (AIRS)
Page, C. * Region-Based Approach to Digital Image Registration with Subpixel Accuracy, A
Page, C.V. * Augmented Relaxation Labeling and Dynamic Relaxation Labeling
Page, D.[David] * Heterogeneous Fusion of Omnidirectional and PTZ Cameras for Multiple Object Tracking
* Sensor planning for automated and persistent object tracking with multiple cameras
Page, D.L.[David L.] * Automated Scene-Specific Selection of Feature Detectors for 3D Face Reconstruction
* Combinational Approach to the Fusion, De-noising and Enhancement of Dual-Energy X-Ray Luggage Images, A
* Gray-Level Grouping (GLG): An Automatic Method for Optimized Image Contrast Enhancement -- Part I: The Basic Method
* Gray-Level Grouping (GLG): An Automatic Method for Optimized Image Contrast Enhancement -- Part II: The Variations
* Linking Feature Lines on 3D Triangle Meshes with Artificial Potential Fields
* Moving Object Tracked by A Mobile Robot with Real-Time Obstacles Avoidance Capacity, A
* MuFeSaC: Learning When to Use Which Feature Detector
* Normal Vector Voting: Crease Detection and Curvature Estimation on Large, Noisy Meshes
* Objective Image Quality Evaluation for JPEG, JPEG 2000, and Vidware VisionTM
* On handling uncertainty in the fundamental matrix for scene and motion adaptive pose recovery
* Perception-based 3D triangle mesh segmentation using fast marching watersheds
* Point fingerprint: A new 3-D object representation scheme
* Robust Crease Detection and Curvature Estimation of Piecewise Smooth Surfaces from Triangle Mesh Approximations Using Normal Voting
* Shape analysis algorithm based on information theory
* Shape Measure for Identifying Perceptually Informative Parts of 3D Objects
* Simultaneous mesh simplification and noise smoothing of range images
* Towards understanding what makes 3D objects appear simple or complex
* Triangle mesh-based edge detection and its application to surface segmentation and adaptive surface smoothing
* Triangle mesh-based surface modeling using adaptive smoothing and implicit surface texture integration
Includes: Page, D.L.[David L.] Page, D.L.
19 for Page, D.L.
Page, G.J. * Check: A Generic and Specific Industrial Inspection Tool
* Statistical Grey-Level Models for Object Location and Identification
Page, I. * fast algorithm for computing optic flow and its implementation on a Transputer array, A
Page, K.J.[Kenneth John] * Water Body Detection and Delineation with Landsat TM Data
Page, V.[Vincent] * Detection of objects composed of several regions by a region-configuration-estimation method
* Grouping with bias for distribution-free mixture model estimation
* Matching two clusters of points extracted from satellite images
Includes: Page, V.[Vincent] Page, V.
Pagel, M. * Self-Calibration of the Fixation Movement of a Stereo Camera Head
Pagello, E. * Cooperation Issues and Distributed Sensing for Multirobot Systems
Pages, J.[Jordi] * Camera-Projector System for Robot Positioning by Visual Servoing, A
* Implementation of a robust coded structured light technique for dynamic 3D measurements
* new optimised de_Bruijn coding strategy for structured light patterns, A
* Optimised De Bruijn patterns for one-shot shape acquisition
* Pattern codification strategies in structured light systems
* Survey Addressing the Fundamental Matrix Estimation Problem, A
Includes: Pages, J.[Jordi] Pages, J. Pagès, J.[Jordi] Pagés, J.
Paget, R. * Automatic) Target Detection in Synthetic Aperture Radar Imagery Via Terrain Recognition
* Extracting the Cliques from a Neighborhood System
* Nonparametric Markov Random Field Model Analysis of the MeasTex Test Suite
* Open-ended Texture Classification for Terrain Mapping
* Strong Markov Random Field Model
* Texture Synthesis and Unsupervised Recognition with a Nonparametric Multiscale Markov Random Field Model
* Texture Synthesis via a Noncausal Nonparametric Multiscale Markov Random Field
Includes: Paget, R. Paget, R.[Rupert]
7 for Paget, R.
Pagli, L. * VLSI Solution to the Vertical Segment Visibility Problem, A
Pagliano, S. * Recognition Experiments of Cursive Dynamic Handwriting with Self-Organizing Networks
Pagliardi, M.[Matteo] * Automatic Mask Extraction for PIV-Based Dam-Break Analysis
* Dry Granular Flows Need Special Tools
Pagliari, C.L.[Carla L.] * Multi-Viewpoint Synthesis from Uncalibrated Stereo Cameras
* Multiscale recurrent patterns applied to stereo image coding
* Reconstruction of intermediate views from stereoscopic images using a rational filter
* Statistical Analyses of Disparity Maps and Disparity Compensated Residuals in the Presence of Occlusions
* Stereo Disparity Computation in the DCT Domain Using Genetic Algorithms
* Stereo image coding using multiscale recurrent patterns
Includes: Pagliari, C.L.[Carla L.] Pagliari, C.L.
Paglieroni, D.W. * Control Point Transforms for Shape Representation and Measurement
* Design considerations for image segmentation quality assessment measures
* Distance Transforms: Properties and Machine Vision Applications
* Fast Classification Of Discrete Shape Contours
* Matching Flexible Polygons to Fields of Corners Extracted from Images
* Position-Orientation Masking Approach To Parametric Search For Template Matching, The
* Unified Distance Transform Algorithm and Architecture, A
Includes: Paglieroni, D.W. Paglieroni, D.W.[David W.]
7 for Paglieroni, D.W.
Pagnan, S. * Noisy Texture Classification: A Higher Order Statistics Approach
* Robust features for textures in additive noise
Pagnutti, M. * NASA's Earth Science Use of Commercially Available Remote Sensing Datasets
* Radiometric characterization of IKONOS multispectral imagery
Includes: Pagnutti, M. Pagnutti, M.[Mary]
Pagola, J.E.M.[Jose E. Medina] * ACONS: A New Algorithm for Clustering Documents
* Formal Distance vs. Association Strength in Text Processing
* TextLec: A Novel Method of Segmentation by Topic Using Lower Windows and Lexical Cohesion
Includes: Pagola, J.E.M.[Jose E. Medina] Pagola, J.E.M.[José E. Medina]
Pagola, M. * Relationship between restricted dissimilarity functions, restricted equivalence functions and normal EN-functions: Image thresholding invariant
Pagot, E. * Moving Targets Velocity and Direction Estimation by Using a Single Optical VHR Satellite Imagery
Index for "p"
--------------------------------------------------------------------------------
Pagani, A.[Alain] * Architecture for Prototyping and Application Development of Visual Tracking Systems, An
* Feature Management for Efficient Camera Tracking
* New Merit Version for MPEG-2 Encoded Files, A
Pagani, M. * Classification of Functional Patterns in SPECT Brain Scans Based on Partial Least Squares Analysis
Paganin, D.M.[David M.] * Stability of phase-contrast tomography
Pagano, T.S. * Prelaunch and in-flight radiometric calibration of the atmospheric infrared sounder (AIRS)
Page, C. * Region-Based Approach to Digital Image Registration with Subpixel Accuracy, A
Page, C.V. * Augmented Relaxation Labeling and Dynamic Relaxation Labeling
Page, D.[David] * Heterogeneous Fusion of Omnidirectional and PTZ Cameras for Multiple Object Tracking
* Sensor planning for automated and persistent object tracking with multiple cameras
Page, D.L.[David L.] * Automated Scene-Specific Selection of Feature Detectors for 3D Face Reconstruction
* Combinational Approach to the Fusion, De-noising and Enhancement of Dual-Energy X-Ray Luggage Images, A
* Gray-Level Grouping (GLG): An Automatic Method for Optimized Image Contrast Enhancement -- Part I: The Basic Method
* Gray-Level Grouping (GLG): An Automatic Method for Optimized Image Contrast Enhancement -- Part II: The Variations
* Linking Feature Lines on 3D Triangle Meshes with Artificial Potential Fields
* Moving Object Tracked by A Mobile Robot with Real-Time Obstacles Avoidance Capacity, A
* MuFeSaC: Learning When to Use Which Feature Detector
* Normal Vector Voting: Crease Detection and Curvature Estimation on Large, Noisy Meshes
* Objective Image Quality Evaluation for JPEG, JPEG 2000, and Vidware VisionTM
* On handling uncertainty in the fundamental matrix for scene and motion adaptive pose recovery
* Perception-based 3D triangle mesh segmentation using fast marching watersheds
* Point fingerprint: A new 3-D object representation scheme
* Robust Crease Detection and Curvature Estimation of Piecewise Smooth Surfaces from Triangle Mesh Approximations Using Normal Voting
* Shape analysis algorithm based on information theory
* Shape Measure for Identifying Perceptually Informative Parts of 3D Objects
* Simultaneous mesh simplification and noise smoothing of range images
* Towards understanding what makes 3D objects appear simple or complex
* Triangle mesh-based edge detection and its application to surface segmentation and adaptive surface smoothing
* Triangle mesh-based surface modeling using adaptive smoothing and implicit surface texture integration
Includes: Page, D.L.[David L.] Page, D.L.
19 for Page, D.L.
Page, G.J. * Check: A Generic and Specific Industrial Inspection Tool
* Statistical Grey-Level Models for Object Location and Identification
Page, I. * fast algorithm for computing optic flow and its implementation on a Transputer array, A
Page, K.J.[Kenneth John] * Water Body Detection and Delineation with Landsat TM Data
Page, V.[Vincent] * Detection of objects composed of several regions by a region-configuration-estimation method
* Grouping with bias for distribution-free mixture model estimation
* Matching two clusters of points extracted from satellite images
Includes: Page, V.[Vincent] Page, V.
Pagel, M. * Self-Calibration of the Fixation Movement of a Stereo Camera Head
Pagello, E. * Cooperation Issues and Distributed Sensing for Multirobot Systems
Pages, J.[Jordi] * Camera-Projector System for Robot Positioning by Visual Servoing, A
* Implementation of a robust coded structured light technique for dynamic 3D measurements
* new optimised de_Bruijn coding strategy for structured light patterns, A
* Optimised De Bruijn patterns for one-shot shape acquisition
* Pattern codification strategies in structured light systems
* Survey Addressing the Fundamental Matrix Estimation Problem, A
Includes: Pages, J.[Jordi] Pages, J. Pagès, J.[Jordi] Pagés, J.
Paget, R. * Automatic) Target Detection in Synthetic Aperture Radar Imagery Via Terrain Recognition
* Extracting the Cliques from a Neighborhood System
* Nonparametric Markov Random Field Model Analysis of the MeasTex Test Suite
* Open-ended Texture Classification for Terrain Mapping
* Strong Markov Random Field Model
* Texture Synthesis and Unsupervised Recognition with a Nonparametric Multiscale Markov Random Field Model
* Texture Synthesis via a Noncausal Nonparametric Multiscale Markov Random Field
Includes: Paget, R. Paget, R.[Rupert]
7 for Paget, R.
Pagli, L. * VLSI Solution to the Vertical Segment Visibility Problem, A
Pagliano, S. * Recognition Experiments of Cursive Dynamic Handwriting with Self-Organizing Networks
Pagliardi, M.[Matteo] * Automatic Mask Extraction for PIV-Based Dam-Break Analysis
* Dry Granular Flows Need Special Tools
Pagliari, C.L.[Carla L.] * Multi-Viewpoint Synthesis from Uncalibrated Stereo Cameras
* Multiscale recurrent patterns applied to stereo image coding
* Reconstruction of intermediate views from stereoscopic images using a rational filter
* Statistical Analyses of Disparity Maps and Disparity Compensated Residuals in the Presence of Occlusions
* Stereo Disparity Computation in the DCT Domain Using Genetic Algorithms
* Stereo image coding using multiscale recurrent patterns
Includes: Pagliari, C.L.[Carla L.] Pagliari, C.L.
Paglieroni, D.W. * Control Point Transforms for Shape Representation and Measurement
* Design considerations for image segmentation quality assessment measures
* Distance Transforms: Properties and Machine Vision Applications
* Fast Classification Of Discrete Shape Contours
* Matching Flexible Polygons to Fields of Corners Extracted from Images
* Position-Orientation Masking Approach To Parametric Search For Template Matching, The
* Unified Distance Transform Algorithm and Architecture, A
Includes: Paglieroni, D.W. Paglieroni, D.W.[David W.]
7 for Paglieroni, D.W.
Pagnan, S. * Noisy Texture Classification: A Higher Order Statistics Approach
* Robust features for textures in additive noise
Pagnutti, M. * NASA's Earth Science Use of Commercially Available Remote Sensing Datasets
* Radiometric characterization of IKONOS multispectral imagery
Includes: Pagnutti, M. Pagnutti, M.[Mary]
Pagola, J.E.M.[Jose E. Medina] * ACONS: A New Algorithm for Clustering Documents
* Formal Distance vs. Association Strength in Text Processing
* TextLec: A Novel Method of Segmentation by Topic Using Lower Windows and Lexical Cohesion
Includes: Pagola, J.E.M.[Jose E. Medina] Pagola, J.E.M.[José E. Medina]
Pagola, M. * Relationship between restricted dissimilarity functions, restricted equivalence functions and normal EN-functions: Image thresholding invariant
Pagot, E. * Moving Targets Velocity and Direction Estimation by Using a Single Optical VHR Satellite Imagery
Index for "p"
--------------------------------------------------------------------------------
Analog VLSI hardware for fuzzy systems
Analog VLSI hardware for fuzzy systems
Our world has an analog nature and it is natural
to process signals in an analog way. Analog signal processing
can be much faster than digital ones and AD or DA
conversion is not required. The main obstacle is to develop
adequate circuits for nonlinear signal processing. In the
presentation several new circuits are proposed. These
circuits use nonlinear characteristics of MOS transistors for
nonlinear signal processing. The fuzzy signal processing is
used as an example. The proposed fuwier circuits are
relatively simple while almost arbitrary shapes of
membership functions can be obtained. The proposed
current mode MAX and MIN operators exhibit accuracy
superior to other circuits. The defudier circuit uses the
concept of signal normalization and weighted sum. New
normalization circuit, operating in the subthreshold
conduction mode, exhibits almost ideal characteristics. The
described new building blocks were used to design the entire
analog fuzzy VLSI chip.
mode, which means that the current not voltage carries the
information.right?
Numerous applications of industrial. electronics use
intelligent control systems. For example many motor
control systems require sophisticated computation. The
intelligence is also involved in smart sensors that are able
to measure flux and other electrical parameters just by
analyzing currents and voltages on the supply terminals.
Hardware implementation of intelligent systems use
computers or microcomputers for the computation. The
digital approach has many advantages. Primarily it is
flexible and easy to be reprogrammed. At the same time
those digital systems are rather complex and they require
analog to digital conversion at the front of the system and
digital to analog conversion at its end. Our world has an
analog nature and it would be wise to perform all
computation in analog fashion.
Refer: IEEE paper
Regards
Roy S
Mtech
Electronic Research And Development Centre Of India
Trivandrum
Our world has an analog nature and it is natural
to process signals in an analog way. Analog signal processing
can be much faster than digital ones and AD or DA
conversion is not required. The main obstacle is to develop
adequate circuits for nonlinear signal processing. In the
presentation several new circuits are proposed. These
circuits use nonlinear characteristics of MOS transistors for
nonlinear signal processing. The fuzzy signal processing is
used as an example. The proposed fuwier circuits are
relatively simple while almost arbitrary shapes of
membership functions can be obtained. The proposed
current mode MAX and MIN operators exhibit accuracy
superior to other circuits. The defudier circuit uses the
concept of signal normalization and weighted sum. New
normalization circuit, operating in the subthreshold
conduction mode, exhibits almost ideal characteristics. The
described new building blocks were used to design the entire
analog fuzzy VLSI chip.
mode, which means that the current not voltage carries the
information.right?
Numerous applications of industrial. electronics use
intelligent control systems. For example many motor
control systems require sophisticated computation. The
intelligence is also involved in smart sensors that are able
to measure flux and other electrical parameters just by
analyzing currents and voltages on the supply terminals.
Hardware implementation of intelligent systems use
computers or microcomputers for the computation. The
digital approach has many advantages. Primarily it is
flexible and easy to be reprogrammed. At the same time
those digital systems are rather complex and they require
analog to digital conversion at the front of the system and
digital to analog conversion at its end. Our world has an
analog nature and it would be wise to perform all
computation in analog fashion.
Refer: IEEE paper
Regards
Roy S
Mtech
Electronic Research And Development Centre Of India
Trivandrum
Wednesday, October 29, 2008
VHDL reference material Contents
VHDL reference material
Contents
# Using Cadence VHDL on GL machine
# Compact Summary of VHDL
# Printable Compact Summary of VHDL
# Sample VHDL code
# VHDL-handbook.pdf
# VHDL designers guide
# VHDL Cookbook in PostScript
# GHDL Download free VHDL compiler and simulator
# Download free VHDL compiler and simulator
# VHDL intro by Francis Bruno in PostScript
# VHDL project by Francis Bruno in PostScript
# VCOMP/VSIM from University of Pittsburgh
# Using FTL Systems Exploration VHDL
# VHDL standard packages and types
# FPGA and other CAD information
# Draft of IEEE Standard VHDL Language
# Other Links
Using Cadence VHDL on GL machine
First: You must have an account on a GL machine. Every student
and faculty should have this.
Either log in directly to cadence.gl.umbc.edu or
Use ssh cadence.gl.umbc.edu
Be in your login directory, else some files need changing.
You can copy many sample files to your working directory using:
cp /afs/umbc.edu/users/s/q/squire/pub/download/cs411.tar .
There are many files available.
Next: Follow instructions exactly or you figure out a variation.
1) Get this tar file into your home directory (on /afs i.e.
available on all GL machines.)
cs411.tar and then type commands:
cp /afs/umbc.edu/users/s/q/squire/pub/download/cs411.tar .
tar -xvf cs411.tar
cd vhdl
mv Makefile.cadence Makefile
tcsh
source vhdl_cshrc
make
more add32_test.out
make clean # saves a lot of disk quota
Then do your own thing with Makefile for other VHDL files
2) The manual, step by step method (same results as above)
Be in your home directory.
mkdir vhdl # for your source code .vhdl .vhd
cd vhdl
mkdir vhdl_lib # your WORK library, keep hands off
You now need to get the following 6 files into you vhdl directory:
vhdl_cshrc
cds.lib change $HOME to your path if needed
hdl.var
Makefile.cadence for first test
add32_test.vhdl for first test
add32_test.run for first test
Make the following modification to cds.lib :
Edit and replace $HOME with the specific path to your home if needed
directory. e.g. /home/grad4/auser12
mv Makefile.cadence Makefile
# Run the test run:
source vhdl_cshrc
make # should be no error messages
more add32_test.out # it should have VHDL simulation output
make clean
You are on your own to write VHDL and modify the Makefile.
Remember each time you log on:
cd vhdl
tcsh
source vhdl_cshrc
make # or do your own thing.
The above is the latest generation Cadence "IUS" "ncvhdl, nceval, ncsim"
GHDL
You can download a free VHDL system form ghdl.free.fr
Follow the instructions for Windows, Linux or MAC OSX
We have tried to get the Linux version onto linux.gl.umbc but
have been unsucessful, it has been installed on personal Linux
machines using root password and installing into /usr/local tree.
The Windows version is a little different, yet it works.
For CMSC 411, you need to do a little extra because GHDL does
not default with some IEEE packages we use.
Using GHDL on your home PC in windows:
Download GHDL from ghdl.free.fr/download.html
click on "installer"
After installing, control panel -> system -> advanced ->
environment variables -> user variables, path, edit
Add to your user path ;C:\"program files"\Ghdl\bin
From a Command prompt window type or use add32_test.bat
rem use GHDL to analyze, elaborate and run add32_test.vhdl
ghdl -a --ieee=synopsys add32.vhdl
ghdl -a --ieee=synopsys add32_test.vhdl
ghdl -e --ieee=synopsys add32_test
ghdl -r --ieee=synopsys add32_test --stop-time=160ns > add32_test.out
Look at file add32_test.out with your favorite editor.
The 160ns is found in the file add32_test.run
The "diff" command on Windows is "fc", ignore the few lines at
beginning and end of comparison of .chk files.
Using FTL Systems Exploration VHDL
First: Read Appendix H of Ashenden's book, p723
The steps are: load the CD, make a registration file,
EMail the file, get back a license file, download the
VHDL analyzer/compiler and simulator.
Then: Follow the Quick Start Guide on page 728.
VHDL Cookbook (PostScript files)
The following eight PostScript files provide an introduction to VHDL
* Contents
* Chapter 1
* Chapter 2
* Chapter 3
* Chapter 4
* Chapter 5
* Chapter 6
* Chapter 7
* BNF for VHDL 93, plain text
The above is by Peter Ashenden who now has an updated version out
as books: "The Student's Guide to VHDL" ISBN 1-55860-520-7 and
"The Designer's Guide to VHDL" second edition ISBN 1-55860-674-2
Examples of VHDL from Ashenden's Designer's Guide are here
Download free VHDL compiler and simulator
This is how I downloaded and installed a free VHDL compiler
and simulator on Windows and Linux systems. It is not 100%
compatible with Cadence, Cadence allows a few non standard constructs,
but it works on many circuits and features.
The Cadence version on cadence.gl.umbc.edu has many bugs not
on cadence1.cs.umbc.edu. For example: alias swrite ... does not work.
A syntax error hangs with a phoney "lock" message.
Using browser: www.symphonyeda.com/proddownloads.htm
Choose Windows ~9.3MB or
Linux ~9.3MB
Execute the Windows file, choose 'setup' and follow instructions
untar the Linux version and follow instructions
For CMSC 411 the project check files are .chks for this VHDL.
VHDL intro by Francis Bruno (PostScript files)
The following four PostScript files provide
Francis Bruno's introduction to VHDL
* Title Page
* Table of Contents
* Body
* Appendix
VHDL project by Francis Bruno (PostScript files)
The following four PostScript files plus index and .tar.gz
files provide Francis Bruno's VHDL project.
* Title Page
* Table of contents
* Body
* Appendix
* Bruno index to models
* VHDL source code as .tar.gz
VCOMP/VSIM from PITT (PostScript file)
The following PostScript file provides an introduction to VHDL
and instructions for compiling and simulating using vcomp/vsim.
* VSIM manual
FPGA and other CAD information
You can get working chips from VHDL using synthesis tools.
One of the quickest ways to get chips is to use FPGA's,
Field Programmable Gate Arrays.
The two companies listed below provide the software and the
foundry for you to design your own integrated circuit chips:
www.altera.com
www.xilinx.com
Complete Computer Aided Design, CAD, packages are available from
companies such as Cadence, Mentor Graphics and Synopsis.
Draft of IEEE Standard VHDL Language
Draft 2000/D3 HERE
Other Links
* Hamburg VHDL Archive (the best set of links I have seen!)
* RASSP Project VHDL Tools
* VHDL Organization Home Page
* A slightly restrictive free version of a commercial VHDL compiler and simulator. Windows and Linux versions.
* gnu GPL VHDL for Linux, under development (no progress since Jan 29, 2002)
* More information on Exploration/VHDL from FTL Systems (seems dead in mid 2003)
Go to top
Last updated 10/3/08
Contents
# Using Cadence VHDL on GL machine
# Compact Summary of VHDL
# Printable Compact Summary of VHDL
# Sample VHDL code
# VHDL-handbook.pdf
# VHDL designers guide
# VHDL Cookbook in PostScript
# GHDL Download free VHDL compiler and simulator
# Download free VHDL compiler and simulator
# VHDL intro by Francis Bruno in PostScript
# VHDL project by Francis Bruno in PostScript
# VCOMP/VSIM from University of Pittsburgh
# Using FTL Systems Exploration VHDL
# VHDL standard packages and types
# FPGA and other CAD information
# Draft of IEEE Standard VHDL Language
# Other Links
Using Cadence VHDL on GL machine
First: You must have an account on a GL machine. Every student
and faculty should have this.
Either log in directly to cadence.gl.umbc.edu or
Use ssh cadence.gl.umbc.edu
Be in your login directory, else some files need changing.
You can copy many sample files to your working directory using:
cp /afs/umbc.edu/users/s/q/squire/pub/download/cs411.tar .
There are many files available.
Next: Follow instructions exactly or you figure out a variation.
1) Get this tar file into your home directory (on /afs i.e.
available on all GL machines.)
cs411.tar and then type commands:
cp /afs/umbc.edu/users/s/q/squire/pub/download/cs411.tar .
tar -xvf cs411.tar
cd vhdl
mv Makefile.cadence Makefile
tcsh
source vhdl_cshrc
make
more add32_test.out
make clean # saves a lot of disk quota
Then do your own thing with Makefile for other VHDL files
2) The manual, step by step method (same results as above)
Be in your home directory.
mkdir vhdl # for your source code .vhdl .vhd
cd vhdl
mkdir vhdl_lib # your WORK library, keep hands off
You now need to get the following 6 files into you vhdl directory:
vhdl_cshrc
cds.lib change $HOME to your path if needed
hdl.var
Makefile.cadence for first test
add32_test.vhdl for first test
add32_test.run for first test
Make the following modification to cds.lib :
Edit and replace $HOME with the specific path to your home if needed
directory. e.g. /home/grad4/auser12
mv Makefile.cadence Makefile
# Run the test run:
source vhdl_cshrc
make # should be no error messages
more add32_test.out # it should have VHDL simulation output
make clean
You are on your own to write VHDL and modify the Makefile.
Remember each time you log on:
cd vhdl
tcsh
source vhdl_cshrc
make # or do your own thing.
The above is the latest generation Cadence "IUS" "ncvhdl, nceval, ncsim"
GHDL
You can download a free VHDL system form ghdl.free.fr
Follow the instructions for Windows, Linux or MAC OSX
We have tried to get the Linux version onto linux.gl.umbc but
have been unsucessful, it has been installed on personal Linux
machines using root password and installing into /usr/local tree.
The Windows version is a little different, yet it works.
For CMSC 411, you need to do a little extra because GHDL does
not default with some IEEE packages we use.
Using GHDL on your home PC in windows:
Download GHDL from ghdl.free.fr/download.html
click on "installer"
After installing, control panel -> system -> advanced ->
environment variables -> user variables, path, edit
Add to your user path ;C:\"program files"\Ghdl\bin
From a Command prompt window type or use add32_test.bat
rem use GHDL to analyze, elaborate and run add32_test.vhdl
ghdl -a --ieee=synopsys add32.vhdl
ghdl -a --ieee=synopsys add32_test.vhdl
ghdl -e --ieee=synopsys add32_test
ghdl -r --ieee=synopsys add32_test --stop-time=160ns > add32_test.out
Look at file add32_test.out with your favorite editor.
The 160ns is found in the file add32_test.run
The "diff" command on Windows is "fc", ignore the few lines at
beginning and end of comparison of .chk files.
Using FTL Systems Exploration VHDL
First: Read Appendix H of Ashenden's book, p723
The steps are: load the CD, make a registration file,
EMail the file, get back a license file, download the
VHDL analyzer/compiler and simulator.
Then: Follow the Quick Start Guide on page 728.
VHDL Cookbook (PostScript files)
The following eight PostScript files provide an introduction to VHDL
* Contents
* Chapter 1
* Chapter 2
* Chapter 3
* Chapter 4
* Chapter 5
* Chapter 6
* Chapter 7
* BNF for VHDL 93, plain text
The above is by Peter Ashenden who now has an updated version out
as books: "The Student's Guide to VHDL" ISBN 1-55860-520-7 and
"The Designer's Guide to VHDL" second edition ISBN 1-55860-674-2
Examples of VHDL from Ashenden's Designer's Guide are here
Download free VHDL compiler and simulator
This is how I downloaded and installed a free VHDL compiler
and simulator on Windows and Linux systems. It is not 100%
compatible with Cadence, Cadence allows a few non standard constructs,
but it works on many circuits and features.
The Cadence version on cadence.gl.umbc.edu has many bugs not
on cadence1.cs.umbc.edu. For example: alias swrite ... does not work.
A syntax error hangs with a phoney "lock" message.
Using browser: www.symphonyeda.com/proddownloads.htm
Choose Windows ~9.3MB or
Linux ~9.3MB
Execute the Windows file, choose 'setup' and follow instructions
untar the Linux version and follow instructions
For CMSC 411 the project check files are .chks for this VHDL.
VHDL intro by Francis Bruno (PostScript files)
The following four PostScript files provide
Francis Bruno's introduction to VHDL
* Title Page
* Table of Contents
* Body
* Appendix
VHDL project by Francis Bruno (PostScript files)
The following four PostScript files plus index and .tar.gz
files provide Francis Bruno's VHDL project.
* Title Page
* Table of contents
* Body
* Appendix
* Bruno index to models
* VHDL source code as .tar.gz
VCOMP/VSIM from PITT (PostScript file)
The following PostScript file provides an introduction to VHDL
and instructions for compiling and simulating using vcomp/vsim.
* VSIM manual
FPGA and other CAD information
You can get working chips from VHDL using synthesis tools.
One of the quickest ways to get chips is to use FPGA's,
Field Programmable Gate Arrays.
The two companies listed below provide the software and the
foundry for you to design your own integrated circuit chips:
www.altera.com
www.xilinx.com
Complete Computer Aided Design, CAD, packages are available from
companies such as Cadence, Mentor Graphics and Synopsis.
Draft of IEEE Standard VHDL Language
Draft 2000/D3 HERE
Other Links
* Hamburg VHDL Archive (the best set of links I have seen!)
* RASSP Project VHDL Tools
* VHDL Organization Home Page
* A slightly restrictive free version of a commercial VHDL compiler and simulator. Windows and Linux versions.
* gnu GPL VHDL for Linux, under development (no progress since Jan 29, 2002)
* More information on Exploration/VHDL from FTL Systems (seems dead in mid 2003)
Go to top
Last updated 10/3/08
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