Google Groups
asicdesign2vlsi
Visit this group
Google Groups
Subscribe to asicdesign2vlsi
Email:
Visit this group

Sunday, July 19, 2009

VLSI Society

The VLSI Society has successfully held its EDA software and design contest at this year's 22nd international conference on VLSI design and embedded systems. The contest is the first of its kind and it provided a platform for individuals and teams to showcase their skills and innovative ideas in the EDA arena.

The results are as follows:

1) EDA contest winners

- 1st Prize (Rs 20,000) was awarded to C. Karfa, D. Sarkar and C. Mandal from IIT Kharagpur for SAST: An Architecture Driven High-Level Synthesis Tool

- 2nd Prize (Rs. 15,000) was awarded to Anupam Bakshi from Agnisys for IDesignSpec

2) Nripendra Nath Biswas – Best Student paper award was awarded to Tameesh Suri and Anneesh Aggarwal from SUNY Binghamton for their paper entitled Improving Scalability and per-core performance in multi-cores through resources sharing and recognition

3) Honourable mention award was given to Subramanian Rajagopalan, Sambuddha Bhattacharya and Shabbir Batterywala from Synopsys for their paper entitled Efficient Analog/RF Layout closure with compaction based legalisation

4) Arun Kumar Chowdhury- Best paper Award was gvien to Nilanjan Mukherjee and Jenusz Rajski from Mentor Graphics, and Artur Pogiel and Jerzy Tyszer from Poznan University of Technology for their paper entitled High speed on-chip event counters for embedded system

5) Design Contest winner

- 1st Prize (Rs. 20,000) was awarded to Genemala Haobijam and Roy Paily from IIT Guwahati for Design of Multilayer Pyramidically wound Inductor and Fully Integrated 2.4GHz VCO in UMC 0.18um RFCMOS Process

- 2nd Prize (Rs. 15,000) was awarded to Chester Rebeiro from IIT-Chennai and Debdeep Mukhopadhayay from IIT-Kharagpur for High Performance Elliptic Curve Cryptographic Processor for FPGA Platforms

- 3rd Prize (Rs. 10,000) was awarded to Amilt Pande & Joseph Zambreno from lowa State Univ, USA for Novel Polymorphic Reconfigurable Hardware Support for Discrete Wavelet Transform

read more on VLSI 2009...



votes: 0
Comment on "VLSI 2009 unveils results of EDA contest"
Comments:
*Verify code:

  1. VLSI 2009: Pushing India's design potential(2009-02-02)
  2. Hardware UART for the TMS320C3x(2001-05-03)
  3. Simulate embedded hardware acceleration(2007-04-18)

Tuesday, July 7, 2009

baby


framework.

changed!Check out our new look!
www.verilogcourseteam.com.

google_protectAndRun("render_ads.js::google_render_ad", google_handleError, google_render_ad);

Friday

SIMULATION MODEL OF VISIBLE WATERMARKING FOR JPEG IMAGE (3 D) USING VLSI/MATLAB
Watermarking is the process that embeds data called a watermark, a tag, or a label into a multimedia object, such as images, video, or text, for their copyright protection. According to human perception, the digital watermarks can either be visible or invisible. A visible watermark is a secondary translucent image overlaid into the primary image and appears visible to a viewer on a careful inspection. The invisible watermark is embedded in such a way that the modifications made to the pixel value is perceptually not noticed, and it can be recovered only with an appropriate decoding mechanism. This project presents a new very large scale integration (VLSI) architecture for implementing two visible digital image watermarking schemes. The proposed architecture is designed to aim at easy integration into any existing digital camera c
 
October (78)
  • Floorplanning Methods
  • Featured Case study
  • VLSI AND SYSTEM DESIGN
  • art in VLSI design
  • Chip-Level Thermal Simulator to Predict VLSI Chip ...
  • Floorplanning Methods
  • Featured Case study
  • VLSI AND SYSTEM DESIGN
  • art in VLSI design
  • Chip-Level Thermal Simulator to Predict VLSI Chip ...