Physical Design

Physical Design



eInfochips’ extensive and innovative Physical Design Services flow is designed to meet the demands of tomorrow's deep sub-micron ASIC designs. Intelligent scripting enables use of EDA tools efficiently in order to achieve a faster time-to-market for your project.

eInfochips specializes in MAGMA design tools for place and route. Our engineers by virtue of their design and verification expertise and experience throughout the physical design flow can ensure that your tape-out is successful.

Physical Design Expertise:

* Low Power Designs
* Clock, Power Gating
* Voltage Scaling
* Multiple Power Domains
* Multi VT Library
* Makefile & Tcl based flow development
* Process expertise 65 – 180nm
* Multiple Clock Domains
* High Speed Interface
* On-chip Analog Blocks
* Latch- based Designs

Processes:

Tools Expertise:

Service


Tools

Prototyping & Hierarchy Planning


First Encounter, BlastPlanPro, JupiterXT

RTL Synthesis


Synopsys DC, Cadence RC, Blast Create

Physical Synthesis


Synopsys PC, Encounter, Blast Fusion, ICCompiler

Place, CTS & Route


Encounter (Nano Route), Blast Fusion, ICCompiler

Signal Integrity


PT-SI, Celtic-ndc, BlastNoise, Cool Time

IR Drop


Voltage Storm, Blast Rail, Cool Time, Apache

Static Timing Analysis


PT-SI, Quartz Time, CTE

Extraction


Starrcxt, Fire & Ice, QuartzRC, Columbus

Layout Verification


Hercules, Caliber, Assura

Formal Verification


Verplex, Formality

DFT & ATPG


Syntest flow, Synopsis

Full Custom Design


Virtuoso - XL

Library Development


Virtuoso - XL

Flow Development


Makefile, TCL, Perl

EM Analysis


Signal Storm, Blast Noise, CoolTime, Apache

Power Analysis


Prime Power, Voltage Storm, Blast Power, Power Theator

Delivering first time working silicon is essential in today's market. It means not only smooth execution, but also flexibility as market requirements evolve and target markets change. eInfochips experienced engineering team can help you build successive iterations of a design to address a specific customer requirement at a low turnaround time and resource utilization.